Patents by Inventor Shivani Srivastava

Shivani Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240055523
    Abstract: Electronic devices and methods are disclosed, including transistors with thick gate dielectric layers. Selected devices and methods shown include multiple layer gate dielectrics. Selected devices and methods shown include a gate dielectric with a first layer having a first width, and a second layer over the first layer, wherein the second layer has a second width smaller than the first width.
    Type: Application
    Filed: August 9, 2022
    Publication date: February 15, 2024
    Inventors: Bingwu Liu, Shivani Srivastava, Dan Mihai Mocuta
  • Patent number: 11811874
    Abstract: Methods, systems, and devices associated with an edge device are described. An edge device can include a processing resource and a memory resource having instructions executable to receive, at the processing resource, the memory resource, or both, and from a first source comprising a device in communication with the edge device, first input associated with a user of the device. The instructions can be executable to receive, from a second source, second input associated with a user of the device, determine, based on the first input and the second input, operational instructions for the device and transmit the operational instructions to the device. The instructions can be executable to update, using a machine learning model, the operational instructions responsive to receiving an indication of performance of the operational instructions by the device and responsive to third input received from the first source, the second source, or both.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: November 7, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Sharmila Velamur, Fatma Arzum Simsek-Ege, Shivani Srivastava, Marsela Pontoh, Lavanya Sriram
  • Publication number: 20230335582
    Abstract: Apparatus and methods are disclosed, including memory devices and systems. Example memory devices, systems and methods include semiconductor devices having two or more fins, the fins separated by one or more inter-fin trenches. An isolation structure is included adjacent to the two or more fins, the isolation structure having a depth greater than the inter-fin trench depth.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 19, 2023
    Inventors: Shivani Srivastava, Toshihiko Miyashita, Dan Mihai Mocuta, Bingwu Liu, Stephen David Snyder
  • Publication number: 20230265188
    Abstract: The invention provides a method of treating a hepatocellular carcinoma with a LAG-3 antagonist alone or in combination with an additional therapeutic agent.
    Type: Application
    Filed: August 27, 2021
    Publication date: August 24, 2023
    Applicant: Bristol-Myers Squibb Company
    Inventors: Shivani SRIVASTAVA, Rebecca A. MOSS, Andrea HORVATH
  • Publication number: 20230141716
    Abstract: Fin field effect transistors (FinFETs) having various different thicknesses of gate oxides and related apparatuses, methods, and computing systems are disclosed. An apparatus includes first FinFETs, second FinFETs, and third FinFETs. The first FinFETs include a first gate oxide material, a second gate oxide material, and a third gate oxide material. The second FinFETs include the second gate oxide material and the third gate oxide material. The third FinFETs include the third gate oxide material. A method includes forming the first gate oxide material on first fins, second fins, and third fins; removing the first gate oxide material from the second fins and the third fins; forming a second gate oxide material over the first fins, the second fins, and the third fins; and removing the second gate oxide material from the third fins.
    Type: Application
    Filed: November 5, 2021
    Publication date: May 11, 2023
    Inventors: Hyuck Soo Yang, Byung Yoon Kim, Yong Mo Yang, Shivani Srivastava
  • Publication number: 20220411499
    Abstract: The disclosure provides a method of treating unresectable or metastatic melanoma in a human patient with a lymphocyte activation gene-3 (LAG-3) antagonist. In some aspects, the method includes a combination of the LAG-3 antagonist with a cytotoxic T-lymphocyte antigen-4 (CTLA-4) inhibitor. In some aspects, the method includes one or more additional therapeutic agents and/or anti-cancer therapies.
    Type: Application
    Filed: November 6, 2020
    Publication date: December 29, 2022
    Applicant: Bristol-Myers Squibb Company
    Inventors: Shivani SRIVASTAVA, Mena ABASKHAROUN
  • Publication number: 20220329657
    Abstract: Methods, systems, and devices associated with an edge device are described. An edge device can include a processing resource and a memory resource having instructions executable to receive, at the processing resource, the memory resource, or both, and from a first source comprising a device in communication with the edge device, first input associated with a user of the device. The instructions can be executable to receive, from a second source, second input associated with a user of the device, determine, based on the first input and the second input, operational instructions for the device and transmit the operational instructions to the device. The instructions can be executable to update, using a machine learning model, the operational instructions responsive to receiving an indication of performance of the operational instructions by the device and responsive to third input received from the first source, the second source, or both.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 13, 2022
    Inventors: Sharmila Velamur, Fatma Arzum Simsek-Ege, Shivani Srivastava, Marsela Pontoh, Lavanya Sriram
  • Patent number: 11351163
    Abstract: The disclosure is directed to methods of treating cancer in subjects with a combination of a monoclonal antibody and (R)-N-(4-chlorophenyl)-2-(cis-4-(6-fluoroquinolin-4-yl)cyclohexyl)propanamide, or a salt thereof.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: June 7, 2022
    Assignee: Bristol-Myers Squibb Company
    Inventors: Paul Andrew Basciano, Justine Kamilah Walker, Penny E. Phillips, Li Zhu, Steven H. Bernstein, James Cassidy, Katy Lynn Simonsen, Alexander Azrilevich, Shivani Srivastava
  • Patent number: 11323521
    Abstract: Methods, systems, and devices associated with an edge device are described. An edge device can include a processing resource and a memory resource having instructions executable to receive, at the processing resource, the memory resource, or both, and from a first source comprising a device in communication with the edge device, first input associated with a user of the device. The instructions can be executable to receive, from a second source, second input associated with a user of the device, determine, based on the first input and the second input, operational instructions for the device and transmit the operational instructions to the device. The instructions can be executable to update, using a machine learning model, the operational instructions responsive to receiving an indication of performance of the operational instructions by the device and responsive to third input received from the first source, the second source, or both.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: May 3, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Sharmila Velamur, Fatma Arzum Simsek-Ege, Shivani Srivastava, Marsela Pontoh, Lavanya Sriram
  • Publication number: 20210238287
    Abstract: The invention provides a medicament for use in treating a tumor in a human gastric or gastro-esophageal junction cancer patient, wherein the medicament is a LAG-3 antagonist, in particular an anti-LAG-3 antibody or a soluble LAG-3, alone or in combination with a PD-1 pathway inhibitor, in particular an anti-PD-1 antibody, and optionally one or more chemotherapeutic agents.
    Type: Application
    Filed: July 25, 2019
    Publication date: August 5, 2021
    Applicant: Bristol-Myers Squibb Company
    Inventor: Shivani SRIVASTAVA
  • Patent number: 10991700
    Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: April 27, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Song Guo, Sanh D. Tang, Vlad Temchenko, Shivani Srivastava
  • Publication number: 20210106618
    Abstract: The present disclosure provides reagents and methods for treating disease using modified immune cells (e.g., T cell comprising CAR or TCR) in combination with an agent associated with induction of immunogenic cell death (ICD) and optionally further in combination with an agent that specifically binds to and/or inhibits an immune suppression component and/or an agonist of an immune stimulatory molecule.
    Type: Application
    Filed: September 6, 2018
    Publication date: April 15, 2021
    Inventors: Stanley R. RIDDELL, Shivani SRIVASTAVA
  • Publication number: 20210069241
    Abstract: The present disclosure provides compositions for treating solid tumors, including modified immune cells that specifically target tumor-associated antigens for immunotherapies, wherein expression or activity of T cell immunoreceptor with Ig and ITIM domains (TIGIT) and/or CD112R in the modified immune cells is inhibited to improve antitumor functionality of the cells. Alternatively, CD226 is overexpressed in such modified immune cells. Also provided are methods for treating solid tumors, such as tumors formed by common epithelial cancers.
    Type: Application
    Filed: October 19, 2018
    Publication date: March 11, 2021
    Inventors: Stanley R. RIDDELL, Susanna Carolina BERGER, Shivani SRIVASTAVA
  • Publication number: 20210030739
    Abstract: The disclosure is directed to methods of treating cancer in subjects with a combination of a monoclonal antibody and (R)-N-(4-chlorophenyl)-2-(cis-4-(6-fluoroquinolin-4-yl)cyclohexyl)propanamide, or a salt thereof.
    Type: Application
    Filed: September 28, 2018
    Publication date: February 4, 2021
    Inventors: Paul Andrew BASCIANO, Justine Kamilah WALKER, Penny E. PHILLIPS, Li ZHU, Steven H. BERNSTEIN, James CASSIDY, Katy Lynn SIMONSEN, Alexander AZRILEVICH, Shivani SRIVASTAVA
  • Publication number: 20200185389
    Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.
    Type: Application
    Filed: February 18, 2020
    Publication date: June 11, 2020
    Inventors: Song Guo, Sanh D. Tang, Vlad Temchenko, Shivani Srivastava
  • Patent number: 10593678
    Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: March 17, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Song Guo, Sanh D. Tang, Vlad Temchenko, Shivani Srivastava
  • Publication number: 20200066730
    Abstract: A method of forming a semiconductor device comprises forming a patterned masking material comprising parallel structures and parallel trenches extending at a first angle from about 30° to about 75° relative to a lateral direction. A mask is provided over the patterned masking material and comprises additional parallel structures and parallel apertures extending at a second, different angle from about 0° to about 90° relative to the lateral direction. The patterned masking material is further patterned using the mask to form a patterned masking structure comprising elongate structures separated by the parallel trenches and additional parallel trenches. Exposed portions of a hard mask material underlying the patterned masking structure are subjected to ARDE to form a patterned hard mask material. Exposed portions of a semiconductive material underlying the patterned hard mask material are removed to form semiconductive pillar structures. Semiconductor devices and electronic systems are also described.
    Type: Application
    Filed: August 24, 2018
    Publication date: February 27, 2020
    Inventors: Song Guo, Sanh D. Tang, Vlad Temchenko, Shivani Srivastava
  • Publication number: 20190218294
    Abstract: A method of treating a tumor in a patient by administering to the patient a therapeutically effective amount of a combination of an anti-PD-1 antibody and an anti-mesothelin antibody-drug conjugate.
    Type: Application
    Filed: September 7, 2017
    Publication date: July 18, 2019
    Inventors: Shivani SRIVASTAVA, Deanne LATHERS, Heather E. VEZINA, Josephine M. CARDARELLI, Peter SABBATINI, Mark S. WADE, Chin PAN
  • Publication number: 20150279694
    Abstract: Some embodiments include methods of forming silicon dioxide in which silicon dioxide is formed across silicon utilizing a first treatment temperature of no greater than about 1000° C., and in which an interface between the silicon dioxide and the silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. Some embodiments include methods of forming transistors in which a trench is formed to extend into monocrystalline silicon. Silicon dioxide is formed along multiple crystallographic planes along an interior of the trench utilizing a first treatment temperature of no greater than about 1000° C., and an interface between the silicon dioxide and the monocrystalline silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. A transistor gate is formed within the trench, and a pair of source/drain regions is formed within the monocrystalline silicon adjacent the transistor gate. Some embodiments include DRAM cells.
    Type: Application
    Filed: June 15, 2015
    Publication date: October 1, 2015
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Shivani Srivastava, Kunal Shrotri, Fawad Ahmed
  • Patent number: 9064692
    Abstract: Some embodiments include methods of forming silicon dioxide in which silicon dioxide is formed across silicon utilizing a first treatment temperature of no greater than about 1000° C., and in which an interface between the silicon dioxide and the silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. Some embodiments include methods of forming transistors in which a trench is formed to extend into monocrystalline silicon. Silicon dioxide is formed along multiple crystallographic planes along an interior of the trench utilizing a first treatment temperature of no greater than about 1000° C., and an interface between the silicon dioxide and the monocrystalline silicon is annealed utilizing a second treatment temperature which is at least about 1050° C. A transistor gate is formed within the trench, and a pair of source/drain regions is formed within the monocrystalline silicon adjacent the transistor gate. Some embodiments include DRAM cells.
    Type: Grant
    Filed: April 19, 2012
    Date of Patent: June 23, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Shivani Srivastava, Kunal Shrotri, Fawad Ahmed