Patents by Inventor Shivanna

Shivanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150220411
    Abstract: A system and method for performing operating system (OS) agnostic hardware validation in a computing system are disclosed. In one example, a hardware validation test is invoked by a management processor. Further, input parameters are obtained based on the hardware validation test by the management processor. Furthermore, hardware devices are determined based on the hardware validation test and the input parameters by the management processor. In addition, a request is sent to perform the hardware validation test on the hardware devices to a system processor by the management processor. Moreover, the hardware validation test is run on the hardware devices by invoking associated hardware specific run-time drivers in a system firmware (SFW) by the system processor. Also, results of the hardware validation test are sent to the management processor by the system processor.
    Type: Application
    Filed: July 17, 2012
    Publication date: August 6, 2015
    Inventor: Suhas Shivanna
  • Patent number: 9056358
    Abstract: A cutter assembly a back plate adapted to be mounted on a machine spindle. The back plate has a stepped portion on its outer circumference. The stepped portion of the back plate including a plurality of circular sectors and locating surfaces at predetermined locations on the outer circumference. A cutter ring is adapted to mount on an outer circumference of the stepped portion of the back plate, and a fastening member is adapted to connect the cutter ring with the back plate.
    Type: Grant
    Filed: April 4, 2012
    Date of Patent: June 16, 2015
    Assignee: KENNAMETAL INC.
    Inventors: Sharath Shankare Gowda, Krishna Prasad Vangipuram Ramaswamy, Shivanna
  • Publication number: 20150067420
    Abstract: Techniques for handling errors on memory modules are provided. An uncorrected error from a pair of memory modules may be received. Memory modules other than the pair of memory modules producing the error may be de-configured. Diagnostic tests may be run on the faded pair of memory modules. The memory module of the pair of memory modules that caused the uncorrected error may be determined.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 5, 2015
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Shivanna Suhas, Ramaiah Mahesh, Suresh Brinda Yelandur, Malhotra Sunil
  • Publication number: 20150031056
    Abstract: The present disclosure provides methods of developing a specific immunoassay for the Pharmacokinetic assessments of peptides, peptide oligomer and polymer including Glatiramer Acetate (GA), also known as Copolymer 1, Copolymer-1, Cop 1 or Cop in the clinical and preclinical matrices.
    Type: Application
    Filed: December 12, 2012
    Publication date: January 29, 2015
    Inventors: Arumgam Murganandam, Bindu Chikkegowda, Konda Narasimha Venkata Raju, Srikanth Sripadrao, Santharam Muralidharan, Thangamma Kunjira Subramani, Navya Shivanna
  • Patent number: 8875142
    Abstract: A multi processor computing system managing tasks based on the health index of the plurality of processors and the priority of tasks to be scheduled. The method comprise receiving the tasks to be scheduled on the computing system; preparing a queue of the tasks based on a scheduling algorithm; computing a health index value for each processor of the computing system; and scheduling the tasks on processors based on the health index value of the processors. A task from a processor with a lower health index may be moved to an available processor with a higher health index.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: October 28, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Suhas Shivanna, Karthik Krishnapuram Ranganathan
  • Publication number: 20130340051
    Abstract: A share group of servers comprises a first server and a second server. The first server has a server partition and a management processor which is separate from said server partition. Usage rights may be transferred from the first server to the second server by executing machine readable instructions on the management processor which is separate from said server partition.
    Type: Application
    Filed: August 17, 2011
    Publication date: December 19, 2013
    Inventors: Santosh Kumar Gangaraj Manoharan, Suhas Shivanna
  • Publication number: 20130212237
    Abstract: A customizable configuration data structure contains information regarding proxies to provide. A proxy infrastructure has a controller to read the customizable configuration data structure and to create the proxies. A management processor has firmware-based features, where the proxies are to access the firmware-based features through an interface between the proxy infrastructure and the management processor.
    Type: Application
    Filed: February 10, 2012
    Publication date: August 15, 2013
    Inventors: Suhas SHIVANNA, Neena Mohanachandran SAILAJA
  • Publication number: 20120257940
    Abstract: The present disclosure provides a cutter assembly (100), said cutter assembly (100) comprises a back plate (101) adapted to mount on a machine spindle, wherein said back plate (101) having stepped portion (201) on its surface. The stepped portion (201) of the back plate (101) comprises plurality of oblong slots (202) and locating surfaces (203) at predetermined locations in its outer circumference. A cutter ring (102) adapted mount on outer circumference of the stepped portion (201) of the back plate (101) and a fastening members (103) to connect said cutter ring (102) with the back plate (101).
    Type: Application
    Filed: April 4, 2012
    Publication date: October 11, 2012
    Applicant: KENNAMETAL INC.
    Inventors: Sharath Shankare Gowda, Krishna Prasad Vangipuram Ramaswamy, Shivanna
  • Patent number: 8205117
    Abstract: A method and system of migratory hardware diagnostic testing is disclosed. In one embodiment, a method includes performing a diagnostic test of a hardware component of a first partition of a server using a first test module embedded in the first partition in response to a receipt of a test command, and storing context data associated with the diagnostic test of the hardware component in a memory associated with the hardware component, where the context data indicates a current state of the diagnostic test of the hardware component. Further, the method includes analyzing the context data upon a receipt of an instruction for a migration of the hardware component to a second partition of the server, and continuing the diagnostic test of the hardware component using a second test module embedded in the second partition based on the context data if the migration is performed.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: June 19, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Suhas Shivanna, Meera K. Raghunandan
  • Publication number: 20100218048
    Abstract: A method and system of migratory hardware diagnostic testing is disclosed. In one embodiment, a method includes performing a diagnostic test of a hardware component of a first partition of a server using a first test module embedded in the first partition in response to a receipt of a test command, and storing context data associated with the diagnostic test of the hardware component in a memory associated with the hardware component, where the context data indicates a current state of the diagnostic test of the hardware component. Further, the method includes analyzing the context data upon a receipt of an instruction for a migration of the hardware component to a second partition of the server, and continuing the diagnostic test of the hardware component using a second test module embedded in the second partition based on the context data if the migration is performed.
    Type: Application
    Filed: April 20, 2009
    Publication date: August 26, 2010
    Inventors: Suhas SHIVANNA, Meera K. RAGHUNANDAN
  • Publication number: 20100205607
    Abstract: A multi processor computing system managing tasks based on the health index of the plurality of processors and the priority of tasks to be scheduled. The method comprise receiving the tasks to be scheduled on the computing system; preparing a queue of the tasks based on a scheduling algorithm; computing a health index value for each processor of the computing system; and scheduling the tasks on processors based on the health index value of the processors. A task from a processor with a lower health index may be moved to an available processor with a higher health index.
    Type: Application
    Filed: October 23, 2009
    Publication date: August 12, 2010
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Suhas SHIVANNA, Karthik Krishnapuram Ranganathan
  • Publication number: 20090202179
    Abstract: A method and system for providing a region based image modification method and system for performing the same. The method includes: selecting at least one region of interest of an image and editing image attributes of the selected region of interest. The edited region of interest is saved separately without affecting the image. The saved regions of interest acts as individual images having their own image attributes and display characteristics. The edited region of interest and original image can be retrieved at later stage without affecting each other.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 13, 2009
    Applicant: GENERAL ELECTRIC COMPANY
    Inventors: Vikram Shivanna, Madhavi K.
  • Publication number: 20080312928
    Abstract: Disclosed herein is a computer implemented method and system for evaluating a mathematical expression spoken in a natural language by a user. The disclosed method and system provides a natural language speech recognition calculator comprising a speech recognition engine. The spoken mathematical expression is transmitted to the speech recognition engine via an audio input device. Mathematical entities of the spoken mathematical expression are extracted and represented in a hierarchical recursive format of a speech recognition grammar implemented by the speech recognition engine. A symbolic mathematical expression is generated from the extracted mathematical entities and then normalized with common measurement units. The normalized mathematical expression is then evaluated to generate a mathematical result. The mathematical result may be synthesized by a text-to-speech engine to produce a voice output.
    Type: Application
    Filed: September 20, 2007
    Publication date: December 18, 2008
    Inventors: Robert Patrick Goebel, Ravi Shivanna