Abstract: A uniform tailored electrical field in a multigate field effect D-mode transistor is automatically provided by a feedback circuit which couples drain bias voltages to the gates of a multigate transistor to bias the gates incrementally such that the highest voltage is applied to the gate nearest the drain while the lowest voltage is applied to the gate nearest the source. E-mode multigate FET's carry higher gate voltage on the gate close to the source compared to a gate voltage on a last gate, located close to the drain. The proper distribution of gate voltages improves the transconductance G.sub.m of the transistor and decreases gate capacitance C.sub.gs, which increases the speed of operation of a multigate FETs.