Abstract: A flexible display device includes a flexible substrate. A conductive layer is disposed on the flexible substrate. The conductive layer has at least a recessed region disposed thereon.

Abstract: A wire and a method of manufacturing are provided the wire for use in an organic light emitting diode device includes three parts, a first part and a third part are located at both ends of the wire respectively and each of the first part and the third part is a single wire, a second part is located between the first part and the third part, and the second part is a composite wire, wherein the composite wire comprises at least two wires. By dividing a middle part of one wire into multiple wires, the purpose of changing a wire width of a single wire is achieved, ductility of the wire can be enhanced, thereby avoiding the occurrence of the problem that the device cannot normally work caused by wire fracture during folding, and improving the using efficiency of the device.

Abstract: Provided are a flexible electronic device and a manufacturing method thereof. The flexible electronic device (200) comprises a flexible substrate (210) and a device layer formed on the flexible substrate (210). The device layer comprises a semiconductor structure (220) and a wire structure (230) connected to the semiconductor structure, the wire structure (230) having an extension direction same to a channel direction of the semiconductor structure (220). The extension direction of the first wire structure (230) forms an included angle smaller than 90° with respect to a stretching direction of the flexible substrate (210).

Abstract: A thin film transistor and a preparation method thereof are provided. The thin film transistor includes an upper gate electrode, a lower gate electrode, an upper insulating layer, a lower insulating layer, a semiconductor layer, a source electrode and a drain electrode. The lower insulating layer is arranged on the lower gate electrode, the semiconductor layer is arranged on the lower insulating layer, the semiconductor layer is respectively lapped with the source electrode and the drain electrode, the upper insulating layer covers the semiconductor layer, and the upper gate electrode is arranged on the upper insulating layer. In a plane parallel to a conducting channel, there is a first gap between an orthographic projection of the upper gate electrode and an orthographic projection of the source electrode, and there is a second gap between the orthographic projection of the upper gate electrode and an orthographic projection of the drain electrode.