Patents by Inventor Shiyang Ji

Shiyang Ji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10741648
    Abstract: A manufacturing yield and reliability of a semiconductor device including a power semiconductor element is improved. A plurality of trenches DT extending in an x direction and spaced apart from each other in a y direction orthogonal to the x direction are formed in a substrate having a main crystal surface tilted with respect to a <11-20> direction. Also, a super-junction structure is constituted of a p-type column region PC made of a semiconductor layer embedded in the trench DT and an n-type column region NC made of a part of the substrate between the trenches DT adjacent in the y direction, and an angle error between the extending direction of the trench DT (x direction) and the <11-20> direction is within ±?. The ? is determined by {arctan {k× (w/h)}}/13 for the trench having a height of h and a width of w. Herein, the k is at least smaller than 2, preferably 0.9 or less, more preferably 0.5 or less, and still more preferably 0.3 or less.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: August 11, 2020
    Assignees: National Institute of Advanced Industrial Science and Technology, Hitachi, Ltd, Fuji Electric Co., Ltd, Mitsubishi Electric Corporation
    Inventors: Ryoji Kosugi, Shiyang Ji, Kazuhiro Mochizuki, Yasuyuki Kawada, Hidenori Kouketsu
  • Publication number: 20190157399
    Abstract: A manufacturing yield and reliability of a semiconductor device including a power semiconductor element is improved. A plurality of trenches DT extending in an x direction and spaced apart from each other in a y direction orthogonal to the x direction are formed in a substrate having a main crystal surface tilted with respect to a <11-20> direction. Also, a super-junction structure is constituted of a p-type column region PC made of a semiconductor layer embedded in the trench DT and an n-type column region NC made of a part of the substrate between the trenches DT adjacent in the y direction, and an angle error between the extending direction of the trench DT (x direction) and the <11-20> direction is within ±?. The ? is determined by {arctan {k× (w/h)}}/13 for the trench having a height of h and a width of w. Herein, the k is at least smaller than 2, preferably 0.9 or less, more preferably 0.5 or less, and still more preferably 0.3 or less.
    Type: Application
    Filed: June 2, 2017
    Publication date: May 23, 2019
    Inventors: Ryoji Kosugi, Shiyang Ji, Kazuhiro Mochizuki, Yasuyuki Kawda, Hidenori Kouketsu
  • Patent number: 10186575
    Abstract: In a silicon carbide semiconductor device, an n-type drift layer is formed on a front surface of an n++-type semiconductor substrate. Next, a trench is formed in the n-type drift layer, from a surface of the n-type drift layer. Next, a p-type pillar region is formed in the trench. A depth of the trench is at least three times a width of the trench. The p-type pillar region is formed by concurrently introducing a p-type first dopant and a gas containing an n-type second dopant incorporated at an atom position different from that of the first dopant.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: January 22, 2019
    Assignees: FUJI ELECTRIC CO., LTD., MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasuyuki Kawada, Shiyang Ji, Ryoji Kosugi, Hidenori Koketsu, Kazuhiro Mochizuki
  • Publication number: 20180248002
    Abstract: In a silicon carbide semiconductor device, an n-type drift layer is formed on a front surface of an n++-type semiconductor substrate. Next, a trench is formed in the n-type drift layer, from a surface of the n-type drift layer. Next, a p-type pillar region is formed in the trench. A depth of the trench is at least three times a width of the trench. The p-type pillar region is formed by concurrently introducing a p-type first dopant and a gas containing an n-type second dopant incorporated at an atom position different from that of the first dopant.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 30, 2018
    Applicants: FUJI ELECTRIC CO., LTD., MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yasuyuki KAWADA, Shiyang JI, Ryoji KOSUGI, Hidenori KOKETSU, Kazuhiro MOCHIZUKI
  • Patent number: 9496345
    Abstract: The present invention provides a semiconductor structure which includes at least a p-type silicon carbide single crystal layer having an ?-type crystal structure, containing aluminum at impurity concentration of 1×1019 cm?3 or higher, and having thickness of 50 ?m or greater. Further provided is a method for producing the semiconductor structure of the present invention which method includes at least epitaxial growth step of introducing silicon carbide source and aluminum source and epitaxially growing p-type silicon carbide single crystal layer over a base layer made of silicon carbide single crystal having ?-type crystal structure, wherein the epitaxial growth step is performed at temperature conditions of from 1,500° C. to 1,700° C., and pressure conditions of from 5×103 Pa to 25×103 Pa.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: November 15, 2016
    Assignees: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY, CENTRAL RESEARCH INSTITUTE OF ELECTRIC POWER INDUSTRY
    Inventors: Kazutoshi Kojima, Shiyang Ji, Tetsuya Miyazawa, Hidekazu Tsuchida, Koji Nakayama, Tetsuro Hemmi, Katsunori Asano
  • Publication number: 20150214306
    Abstract: The present invention provides a semiconductor structure which includes at least a p-type silicon carbide single crystal layer having an ?-type crystal structure, containing aluminum at impurity concentration of 1×1019 cm?3 or higher, and having thickness of 50 ?m or greater. Further provided is a method for producing the semiconductor structure of the present invention which method includes at least epitaxial growth step of introducing silicon carbide source and aluminum source and epitaxially growing p-type silicon carbide single crystal layer over a base layer made of silicon carbide single crystal having ?-type crystal structure, wherein the epitaxial growth step is performed at temperature conditions of from 1,500° C. to 1,700° C., and pressure conditions of from 5×103 Pa to 25×103 Pa.
    Type: Application
    Filed: July 31, 2013
    Publication date: July 30, 2015
    Inventors: Kazutoshi Kojima, Shiyang Ji, Tetsuya Miyazawa, Hidekazu Tsuchida, Koji Nakayama, Tetsuro Hemmi, Katsunori Asano