Patents by Inventor Shiyu Yue

Shiyu Yue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047267
    Abstract: Embodiments of methods and associated apparatus for filling features in a silicon-containing dielectric layer of a substrate are provided herein. In some embodiments, a method of filling features in a silicon-containing dielectric layer of a substrate includes: depositing a discontinuous liner layer in the feature via a physical vapor deposition (PVD) process in a first process chamber; performing a hydrogen plasma process in a second process chamber to form silicon-hydrogen bonds on surfaces of the feature not covered by the discontinuous liner layer; and depositing a bulk tungsten layer on the discontinuous liner layer and over the silicon-hydrogen bonds to fill the feature with tungsten in a third process chamber.
    Type: Application
    Filed: July 31, 2023
    Publication date: February 8, 2024
    Inventors: Tsung-Han YANG, Shiyu YUE, Rongjun WANG
  • Publication number: 20240014072
    Abstract: A method of forming a semiconductor device structure includes forming a nucleation layer within at least one feature. The method includes exposing the nucleation layer to a nitrogen plasma treatment. The nitrogen plasma treatment preferentially treats the top field and sidewalls while leaving the bottom surface substantially untreated to encourage bottom up metal growth.
    Type: Application
    Filed: June 21, 2023
    Publication date: January 11, 2024
    Inventors: Tsung-Han YANG, Zhimin QI, Yongqian GAO, Rongjun WANG, Yi XU, Yu LEI, Xingyao GAO, Chih-Hsun HSU, Xi CEN, Wei LEI, Shiyu YUE, Aixi ZHANG, Kai WU, Xianmin TANG
  • Publication number: 20230420295
    Abstract: A method and apparatus for tungsten gap-fill in semiconductor devices are provided. The method includes performing a gradient oxidation process to oxidize exposed portions of a liner layer, wherein the gradient oxidation process preferentially oxidizes an overhang portion of the liner layer, which obstructs or blocks top openings of one or more features formed within a field region of a substrate. The method further includes performing an etchback process to remove or reduce the oxidized overhang portion of the liner layer, exposing the liner layer to a chemical vapor transport (CVT) process to remove metal oxide remaining from the gradient oxidation process and the etchback process, and performing a tungsten gap-fill process to fill or partially fill the one or more features.
    Type: Application
    Filed: April 11, 2023
    Publication date: December 28, 2023
    Inventors: Tsung-Han YANG, Xingyao GAO, Shiyu YUE, Chih-Hsun HSU, Shirish PETHE, Rongjun WANG, Yi XU, Wei LEI, Yu LEI, Aixi ZHANG, Xianyuan ZHAO, Zhimin QI, Jiang LU, Xianmin TANG
  • Publication number: 20230343643
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: July 19, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Wei LEI, Yi XU, Jiang LU, Yu LEI, Ziye XIONG, Tsung-Han YANG, Zhimin QI, Aixi ZHANG, Jie ZHANG, Liqi WU, Rongjun WANG, Shihchung CHEN, Meng-Shan WU, Chun-Chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG, Xianmin TANG
  • Publication number: 20230343644
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on an exposed surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in a top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed in a first process chamber to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process is performed in the first process chamber removes or reduces the oxidized portion of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: November 28, 2022
    Publication date: October 26, 2023
    Inventors: Chih-Hsun HSU, Shiyu YUE, Jiang LU, Rongjun WANG, Xianmin TANG, Zhenjiang CUI, Chi Hong CHING, Meng-Shan WU, Chun-chieh WANG, Wei LEI, Yu LEI
  • Publication number: 20230343645
    Abstract: A method and apparatus for a gap-fill in semiconductor devices are provided. The method includes forming a metal seed layer on exposed top surface of the substrate, wherein the substrate has features in the form of trenches or vias formed in the top surface of the substrate, the features having sidewalls and a bottom surface extending between the sidewalls. A gradient oxidation process is performed to oxidize exposed portions of the metal seed layer to form a metal oxide, wherein the gradient oxidation process preferentially oxidizes a field region of the substrate over the bottom surface of the features. An etch back process removes the oxidized portion of the seed layer. A second etch process removes portions of the seed layer. A metal gap-fill process fills or partially fills the features with a gap fill material.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 26, 2023
    Inventors: Meng-Shan WU, Chih-Hsun HSU, Jiang LU, Shiyu YUE, Chun-chieh WANG, Annamalai LAKSHMANAN, Yixiong YANG
  • Publication number: 20230323543
    Abstract: Embodiments of the disclosure advantageously provide in situ selectively deposited molybdenum films having reduced resistivity and methods of reducing or eliminating lateral growth of a selectively deposited molybdenum layer. Additional embodiments provide integrated clean and deposition processes which improve the selectivity of in situ selectively deposited molybdenum films on features, such as a via. Further embodiments advantageously provide methods of improving uniformity and selectivity of bottom-up gap fill for vias with improved film properties.
    Type: Application
    Filed: April 6, 2022
    Publication date: October 12, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Tuerxun Ailihumaer, Yixiong Yang, Annamalai Lakshmanan, Srinivas Gandikota, Yogesh Sharma, Pei Hsuan Lin, Yi Xu, Zhimin Qi, Aixi Zhang, Shiyu Yue, Yu Lei
  • Publication number: 20230326791
    Abstract: Embodiments of methods and associated apparatus for filling a feature in a substrate are provided herein. In some embodiments, a method of depositing tungsten in features of a substrate includes: depositing a seed layer consisting essentially of tungsten in the features via a physical vapor deposition (PVD) process; and depositing a bulk layer consisting essentially of tungsten in the features via a chemical vapor deposition (CVD) process to fill the features such that the deposition of the bulk layer is selective to within the features as compared to a field region of the substrate, wherein the CVD process is performed by flowing hydrogen gas (H2) at a first flow rate and a tungsten precursor at a second flow rate, and wherein the first flow rate is less than the second flow rate.
    Type: Application
    Filed: April 11, 2022
    Publication date: October 12, 2023
    Inventors: Zhimin QI, Yi XU, Shirish A. PETHE, Xingyao GAO, Shiyu YUE, Aixi ZHANG, Wei LEI, Yu LEI, Geraldine VASQUEZ, Dien-yeh WU, Da HE
  • Publication number: 20230088552
    Abstract: Magnet assemblies comprising a housing with a top plate each comprising aligned openings are described. The housing has a bottom ring and an annular wall with a plurality of openings formed in the bottom ring. The top plate is on the housing and has a plurality of openings aligned with the plurality of openings in the bottom ring of the housing. The magnet assembly may also include a non-conducting base plate and/or a conductive cover plate. Methods for using the magnet assembly and magnetic field tuning are also described.
    Type: Application
    Filed: September 17, 2021
    Publication date: March 23, 2023
    Applicant: Applied Materials, Inc.
    Inventors: Borui Xia, Anthony Chih-Tung Chan, Shiyu Yue, Wei Lei, Aravind Miyar Kamath, Mukund Sundararajan, Rongjun Wang, Adolph Miller Allen