Abstract: An integrated circuit comprises a first functional unit and one or more other functional units. The first functional unit has an input for receiving data and an output for providing data. The integrated circuit tests and operates the first functional unit. Testing comprises: connecting the input of the first functional unit to the output of the first functional unit, thereby generating a loopback path from the output of the first functional unit to the input of the first functional unit; loading a test pattern onto the first functional unit; feeding a test clock signal comprising one or more clock edges, thereby prompting the first functional unit to transform the test pattern; and reading the transformed test pattern. Operating the first functional unit comprises: connecting the input of the first functional unit to an output of the other functional units; and feeding a normal clock signal to the first functional unit.

Abstract: An integrated circuit includes overlapping scan domains, wherein at least one scan domain of the integrated circuit includes some, but not all, of the synchronous logic elements, logic gates, and signal paths of a different scan domain. Each scan domain includes a scan wrapper to receive test patterns generated to test the logic mix for that domain. The test patterns are propagated through the logic mix of the scan domain to generate corresponding output patterns, which are compared to expected results for that scan domain. By overlapping the scan domains, test coverage of the integrated circuit can be increased without substantially increasing testing time. The test patterns applied to the integrated circuit can be pruned to remove duplicate patterns generated for overlapping scan domains.

Abstract: An integrated circuit comprises a first functional unit and one or more other functional units. The first functional unit has an input for receiving data and an output for providing data. The integrated circuit tests and operates the first functional unit. Testing comprises: connecting the input of the first functional unit to the output of the first functional unit, thereby generating a loopback path from the output of the first functional unit to the input of the first functional unit; loading a test pattern onto the first functional unit; feeding a test clock signal comprising one or more clock edges, thereby prompting the first functional unit to transform the test pattern; and reading the transformed test pattern. Operating the first functional unit comprises: connecting the input of the first functional unit to an output of the other functional units; and feeding a normal clock signal to the first functional unit.