Patents by Inventor Shmuel Wimer

Shmuel Wimer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SYSTEM AND METHOD FOR GENERATING A CLOCK GATING NETWORK FOR LOGIC CIRCUITS
    Publication number: 20130194016
    Abstract: A system and method for generating a power efficient clock gating network for a Very Large Scale Integration (VLSI) circuit. Statistical analysis is performed upon the activity of component registers of the circuit and registers having correlated toggling behavior are clustered into sets and provided with common clock gaters. The clock gating network may be generated independently from the logical structure of the circuit.
    Type: Application
    Filed: January 31, 2012
    Publication date: August 1, 2013
    Inventor: SHMUEL WIMER
  • Arrangements for automatic re-legging of transistors
    Patent number: 7079989
    Abstract: Arrangements for automatic re-legging of transistors.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: July 18, 2006
    Inventor: Shmuel Wimer
  • Arrangements for automatic re-legging of transistors
    Publication number: 20030005401
    Abstract: Arrangements for automatic re-legging of transistors.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventor: Shmuel Wimer