Patents by Inventor Sho Matsuzaki

Sho Matsuzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11836001
    Abstract: A circuit device includes a first power supply line to which a first power supply voltage is supplied, a second power supply line to which a second power supply voltage is supplied, a third power supply line, a power supply circuit, a predetermined circuit, a first power-on reset circuit, a second power-on reset circuit, and a reset control circuit. When a first power-on reset signal and a second power-on reset signal become a reset release level, the reset control circuit sets a third power-on reset signal output to at least a part of the predetermined circuit to a reset release level.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: December 5, 2023
    Inventor: Sho Matsuzaki
  • Patent number: 11531367
    Abstract: A circuit device includes a comparator, a reference voltage generation circuit, and a coupling control circuit. The comparator is configured to output a power-on reset signal by comparing a monitoring target voltage generated from a power supply voltage with a reference voltage. The reference voltage generation circuit is configured to generate the reference voltage. The coupling control circuit is coupled between a power supply voltage node and a reference voltage node. The coupling control circuit couples the reference voltage node and the power supply voltage node in a predetermined period after the power supply voltage is supplied.
    Type: Grant
    Filed: July 9, 2021
    Date of Patent: December 20, 2022
    Inventor: Sho Matsuzaki
  • Publication number: 20220035398
    Abstract: A circuit device includes a first power supply line to which a first power supply voltage is supplied, a second power supply line to which a second power supply voltage is supplied, a third power supply line, a power supply circuit, a predetermined circuit, a first power-on reset circuit, a second power-on reset circuit, and a reset control circuit. When a first power-on reset signal and a second power-on reset signal become a reset release level, the reset control circuit sets a third power-on reset signal output to at least a part of the predetermined circuit to a reset release level.
    Type: Application
    Filed: July 28, 2021
    Publication date: February 3, 2022
    Inventor: Sho MATSUZAKI
  • Publication number: 20220011808
    Abstract: A circuit device includes a comparator, a reference voltage generation circuit, and a coupling control circuit. The comparator is configured to output a power-on reset signal by comparing a monitoring target voltage generated from a power supply voltage with a reference voltage. The reference voltage generation circuit is configured to generate the reference voltage. The coupling control circuit is coupled between a power supply voltage node and a reference voltage node. The coupling control circuit couples the reference voltage node and the power supply voltage node in a predetermined period after the power supply voltage is supplied.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 13, 2022
    Inventor: Sho MATSUZAKI
  • Patent number: 11196287
    Abstract: A real-time clock module includes a switch circuit that is electrically coupled to a first node to which a first power supply voltage is applied and a second node to which a second power supply voltage is applied and switches between outputting the first power supply voltage and outputting the second power supply voltage, a power supply detection circuit that detects a voltage value of the first power supply voltage, a switch control circuit that controls the switching of the switch circuit based on an output of the power supply detection circuit, a constant voltage circuit that outputs a constant voltage signal based on the output of the switch circuit, and a current control circuit that controls a current supplied to the constant voltage circuit, in which, when where the switch control circuit switches the switch circuit, the current control circuit increases the current supplied to the constant voltage circuit.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: December 7, 2021
    Assignee: SEIKO EPSON CORPORATION
    Inventor: Sho Matsuzaki
  • Publication number: 20200274387
    Abstract: A real-time clock module includes a switch circuit that is electrically coupled to a first node to which a first power supply voltage is applied and a second node to which a second power supply voltage is applied and switches between outputting the first power supply voltage and outputting the second power supply voltage, a power supply detection circuit that detects a voltage value of the first power supply voltage, a switch control circuit that controls the switching of the switch circuit based on an output of the power supply detection circuit, a constant voltage circuit that outputs a constant voltage signal based on the output of the switch circuit, and a current control circuit that controls a current supplied to the constant voltage circuit, in which, when where the switch control circuit switches the switch circuit, the current control circuit increases the current supplied to the constant voltage circuit.
    Type: Application
    Filed: February 19, 2020
    Publication date: August 27, 2020
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Sho MATSUZAKI
  • Patent number: 10135391
    Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element, a capacitance circuit connected to the oscillating circuit, and capable of correcting an oscillation frequency of the oscillating circuit, a logic circuit to which a signal output from the oscillating circuit is input, and which is capable of correcting a frequency of the signal, and a control circuit adapted to control an operation of the capacitance circuit and an operation of the logic circuit.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Toru Shirotori, Hisashi Yamaguchi, Masaki Wakamori, Toshiya Usuda, Masayuki Kamiyama, Sho Matsuzaki, Hiroshi Kiya, Tsuyoshi Yoneyama
  • Patent number: 10128854
    Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: November 13, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Toru Shirotori, Hisashi Yamaguchi, Masaki Wakamori, Toshiya Usuda, Sho Matsuzaki, Tsuyoshi Yoneyama, Masayuki Kamiyama, Hiroshi Kiya
  • Publication number: 20170063380
    Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element having a frequency-temperature characteristic, and a frequency adjustment circuit having a capacitance circuit connected to the oscillating circuit and adapted to adjust an oscillation frequency of the oscillating circuit, and a logic circuit, to which a signal having been output from the oscillating circuit is input, and which adjusts a frequency of the signal, and the frequency adjustment circuit compensates the frequency-temperature characteristic using at least the capacitance circuit in a predetermined temperature range, and compensates the frequency-temperature characteristic using the logic circuit alone outside the predetermined temperature range.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 2, 2017
    Inventors: Toru SHIROTORI, Hisashi YAMAGUCHI, Masaki WAKAMORI, Toshiya USUDA, Sho MATSUZAKI, Tsuyoshi YONEYAMA, Masayuki KAMIYAMA, Hiroshi KIYA
  • Publication number: 20170063305
    Abstract: An oscillation circuit includes an oscillating circuit adapted to oscillate a resonator element, a capacitance circuit connected to the oscillating circuit, and capable of correcting an oscillation frequency of the oscillating circuit, a logic circuit to which a signal output from the oscillating circuit is input, and which is capable of correcting a frequency of the signal, and a control circuit adapted to control an operation of the capacitance circuit and an operation of the logic circuit.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 2, 2017
    Inventors: Toru SHIROTORI, Hisashi YAMAGUCHI, Masaki WAKAMORI, Toshiya USUDA, Masayuki KAMIYAMA, Sho MATSUZAKI, Hiroshi KIYA, Tsuyoshi YONEYAMA
  • Patent number: 6463010
    Abstract: An electronic timepiece comprises a battery, capable of charging, a charging section for charging the battery, a timepiece control circuit performing time keeping operation by using a stored electric power in the battery, a display for displaying time kept by the timepiece control circuit, a voltage detecting circuit for detecting a voltage of the stored voltage of the battery, and a charging detecting section for detecting a state of charging to the battery, and this timepiece, when the voltage of the stored voltage declines below a first prescribed voltage which is higher than an operation stop voltage of the timepiece control circuit, and non-charging state is detected for a prescribed time period, executes a forcible stop upon the time keeping operation by lowering or shutting off a current for the timepiece control circuit, and lifts the forcible stop when a prescribed operation return condition is satisfied.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: October 8, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Shinji Nakamiya, Teruhiko Fujisawa, Sho Matsuzaki