Abstract: A frequency divider is provided which uses common circuitry to switch between different duty cycle outputs. The divider has one or more memory elements with a feedback loop and which are controllable to adjust a duty cycle of an output signal. Each memory element has a first regenerative cell and a second regenerative cell, and where one of the regenerative cells is a controllable regenerative cell which can be controlled to vary the duty cycle of an output of the frequency divider circuit. The controllable regenerative cell can be selectively activated so that in a first configuration where the controllable regenerative cell is activated an output of the frequency divider circuit has a first duty cycle and in a second configuration where the controllable regenerative cell is deactivated an output of the frequency divider circuit has a second duty cycle.

Abstract: A radio frequency input/output circuit with a composite inductor structure is presented. The composite inductor structure has a plurality of inductors that are interwound. The composite inductor structure is implemented on a chip. The plurality of inductors are magnetically coupled. The plurality of inductors are interwound around a core. A second inductor is coupled in series with a first inductor and the first inductor is coupled in series with the third inductor. The first inductor and the third inductor are coupled at a centre tap, such that the first inductor and the third inductor form a centre-tapped coil. The centre tap is coupled to an input terminal.

Abstract: A bias generator and a method for generating a bias voltage are presented. The bias generator is for use with an electronic circuit comprising a first switch coupled in series with a second switch. The bias generator is adapted to generate a reference voltage, a first bias voltage, and a second bias voltage. The second bias voltage is based on the reference voltage. After applying the first voltage to the first switch and the second voltage to the second switch, the bias generator controls a voltage across the first switch. The bias generator may be adapted to set a value of the reference voltage to control the voltage across the first switch. For instance, the reference voltage may be set to a fix value so that the voltage across the first switch is maintained at a constant value.

Abstract: A bias generator and a method for generating a bias voltage are presented. The bias generator is for use with an electronic circuit comprising a first switch coupled in series with a second switch. The bias generator is adapted to generate a reference voltage, a first bias voltage, and a second bias voltage. The second bias voltage is based on the reference voltage. After applying the first voltage to the first switch and the second voltage to the second switch, the bias generator controls a voltage across the first switch. The bias generator may be adapted to set a value of the reference voltage to control the voltage across the first switch. For instance, the reference voltage may be set to a fix value so that the voltage across the first switch is maintained at a constant value.

Abstract: The present document describes a digital power amplifier configured to provide an amplified output signal at an output port based on an input signal. The power amplifier comprises a drive unit configured to generate a high side drive signal comprising a sequence of pulses for controlling the high side switch and a low side drive signal comprising a sequence of pulses for controlling the low side switch, respectively. The drive signals are generated such that the pulses of the high side drive signal are non-overlapping with regards to the pulses of the low side drive signal, and such that the sequence of pulses of the high side drive signal and the sequence of pulses of the low side drive signal have a reduced fraction of energy from higher order harmonics compared to a sequence of rectangular shaped pulses.

Abstract: A radio frequency input/output circuit with a composite inductor structure is presented. The composite inductor structure has a plurality of inductors that are interwound. The composite inductor structure is implemented on a chip. The plurality of inductors are magnetically coupled. The plurality of inductors are interwound around a core. A second inductor is coupled in series with a first inductor and the first inductor is coupled in series with the third inductor. The first inductor and the third inductor are coupled at a centre tap, such that the first inductor and the third inductor form a centre-tapped coil. The centre tap is coupled to an input terminal.