Patents by Inventor Shobhit Chahar

Shobhit Chahar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11495978
    Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: November 8, 2022
    Assignee: Intel Corporation
    Inventors: Anil Baby, Anoop Parchuru, Shobhit Chahar, Govindaraj G., Vinaya Kumar Chandrasekhara
  • Patent number: 11474589
    Abstract: Described are mechanisms and methods to facilitate power saving in Type-C connectors. Some embodiments may comprise an interface to a Configuration Channel (CC) signal path and to a ground signal path of a Universal Serial Bus (USB) Type-C connector port, a first circuitry, and a second circuitry. The first circuitry may be operable to place toggled values on the CC signal path. The second circuitry may be operable to couple the ground signal path to a detection signal path. The placement of the toggled values on the CC signal path is enabled when the detection signal path carries a first value that corresponds with the USB Type-C connector port being connected to a USB Type-C device, and may be disabled when the detection signal path carries a second value that corresponds with the USB Type-C connector port not being connected to a USB Type-C device.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: October 18, 2022
    Assignee: Intel Corporation
    Inventors: Tarakesava Reddy Koki, Phani K Alaparthi, Ranganadh Kss, Shobhit Chahar
  • Publication number: 20210382541
    Abstract: Described are mechanisms and methods to facilitate power saving in Type-C connectors. Some embodiments may comprise an interface to a Configuration Channel (CC) signal path and to a ground signal path of a Universal Serial Bus (USB) Type-C connector port, a first circuitry, and a second circuitry. The first circuitry may be operable to place toggled values on the CC signal path. The second circuitry may be operable to couple the ground signal path to a detection signal path. The placement of the toggled values on the CC signal path is enabled when the detection signal path carries a first value that corresponds with the USB Type-C connector port being connected to a USB Type-C device, and may be disabled when the detection signal path carries a second value that corresponds with the USB Type-C connector port not being connected to a USB Type-C device.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Inventors: Tarakesava Reddy Koki, Phani K Alaparthi, Ranganadh KSS, Shobhit Chahar
  • Patent number: 11099623
    Abstract: Described are mechanisms and methods to facilitate power saving in Type-C connectors. Some embodiments may comprise an interface to a Configuration Channel (CC) signal path and to a ground signal path of a Universal Serial Bus (USB) Type-C connector port, a first circuitry, and a second circuitry. The first circuitry may be operable to place toggled values on the CC signal path. The second circuitry may be operable to couple the ground signal path to a detection signal path. The placement of the toggled values on the CC signal path is enabled when the detection signal path carries a first value that corresponds with the USB Type-C connector port being connected to a USB Type-C device, and may be disabled when the detection signal path carries a second value that corresponds with the USB Type-C connector port not being connected to a USB Type-C device.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: August 24, 2021
    Assignee: INTEL CORPORATION
    Inventors: Tarakesava Reddy K, Phani K Alaparthi, Ranganadh K S S, Shobhit Chahar
  • Publication number: 20210167611
    Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 3, 2021
    Applicant: Intel Corporation
    Inventors: Anil Baby, Anoop Parchuru, Shobhit Chahar, Govindaraj G., Vinaya Kumar Chandrasekhara
  • Patent number: 10862316
    Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
    Type: Grant
    Filed: September 29, 2018
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: Anil Baby, Anoop Parchuru, Shobhit Chahar, Govindaraj G, Vinaya Kumar Chandrasekhara
  • Patent number: 10747284
    Abstract: An apparatus is provided which includes: an input/output (I/O) port to be coupled to a device external to the apparatus; a battery having an output node; a voltage regulator to selectively supply power from the I/O port to the battery, to charge the battery; and a switch coupled between the I/O port and the output node, wherein the switch is to selectively allow flow of current from the device to the output node by bypassing the voltage regulator.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: August 18, 2020
    Assignee: Intel Corporation
    Inventors: Tarakesava Reddy Koki, Jagadish Vasudeva Singh, Arvind Sundaram, Vinaya Kumar Chandrasekhara, Shobhit Chahar
  • Publication number: 20190305563
    Abstract: An apparatus is provided which includes: an input/output (I/O) port to be coupled to a device external to the apparatus; a battery having an output node; a voltage regulator to selectively supply power from the I/O port to the battery, to charge the battery; and a switch coupled between the I/O port and the output node, wherein the switch is to selectively allow flow of current from the device to the output node by bypassing the voltage regulator.
    Type: Application
    Filed: March 27, 2018
    Publication date: October 3, 2019
    Applicant: Intel Corporation
    Inventors: Tarakesava Reddy Koki, Jagadish Vasudeva Singh, Arvind Sundaram, Vinaya Kumar Chandrasekhara, Shobhit Chahar
  • Publication number: 20190081487
    Abstract: In some examples, a system includes a primary side with a charger and a first battery and a secondary side with a second battery. The charger on the primary side can charge both the first battery and the second battery. A hinge resistance is between the primary side and the secondary side. The primary side includes a feedback controlled active device in a current path of the first battery that compensates for the hinge resistance, for connector resistances, or for battery impedances in a current path of the second battery.
    Type: Application
    Filed: September 29, 2018
    Publication date: March 14, 2019
    Inventors: Anil Baby, Anoop Parchuru, Shobhit Chahar, Govindaraj G, Vinay K. C