Patents by Inventor Shogo Hirai
Shogo Hirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8658910Abstract: A circuit board includes a core substrate portion, an insulating layer, a second wiring, and a via to be a cured product of a via paste. The via paste has a first latent curing agent and a second latent curing agent, an uncured resin mixture, and a conductive particle. Both a softening temperature of the first latent curing agent and that of the second latent curing agent are equal to or higher than 40° C. and are equal to or lower than 200° C., and a difference between the softening temperature of the first latent curing agent and that of the second latent curing agent is equal to or higher than 10° C. and is equal to or lower than 140° C.Type: GrantFiled: June 7, 2012Date of Patent: February 25, 2014Assignee: Panasonic CorporationInventors: Tetsuro Kubo, Tsuyoshi Himori, Shogo Hirai
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Patent number: 8604350Abstract: A multilayer wiring board includes an insulating resin layer, wirings laid on their respective opposite surfaces of the insulating resin layer, and a via-hole conductor for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes first metal regions including a joined unit made of copper particles for connecting the wirings, second metal regions mainly composed of, for example, tin, a tin-copper alloy, or a tin-copper intermetallic compound, and third metal regions mainly composed of bismuth and in contact with the second metal regions. The copper particles forming the joined unit are in plane contact with one another to form plane contact portions, and the second metal regions at least partially are in contact with the first metal regions.Type: GrantFiled: February 22, 2011Date of Patent: December 10, 2013Assignee: Panasonic CorporationInventors: Tsuyoshi Himori, Shogo Hirai, Hiroyuki Ishitomi, Satoru Tomekawa, Yutaka Nakayama
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Patent number: 8563872Abstract: A wiring board includes a plurality of wirings laid via an insulating resin layer, and a via-hole conductor provided for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes a region made of copper particles, a first metal region mainly composed of tin, a tin-copper alloy, or a tin-copper intermetallic compound, and a second metal region mainly composed of bismuth, and has Cu/Sn of from 1.59 to 21.43. The copper particles are in contact with one another, thereby electrically connecting the wirings, and at least part of the first metal region covers around and extends over the portions where the copper particles are in plane contact with one another.Type: GrantFiled: February 22, 2011Date of Patent: October 22, 2013Assignees: Panasonic Corporation, Kyoto Elex Co., Ltd.Inventors: Shogo Hirai, Hiroyuki Ishitomi, Tsuyoshi Himori, Satoru Tomekawa, Yutaka Nakayama
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Publication number: 20130153276Abstract: A circuit board includes a core substrate portion, an insulating layer, a second wiring, and a via to be a cured product of a via paste. The via paste has a first latent curing agent and a second latent curing agent, an uncured resin mixture, and a conductive particle. Both a softening temperature of the first latent curing agent and that of the second latent curing agent are equal to or higher than 40° C. and are equal to or lower than 200° C., and a difference between the softening temperature of the first latent curing agent and that of the second latent curing agent is equal to or higher than 10° C. and is equal to or lower than 140° C.Type: ApplicationFiled: June 7, 2012Publication date: June 20, 2013Inventors: Tetsuro Kubo, Tsuyoshi Himori, Shogo Hirai
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Publication number: 20130068513Abstract: Disclosed is a multilayer wiring board having via-hole conductors, the via-hole conductor including a metal portion and a resin portion. The metal portion includes a first metal region which includes a link of copper particles forming a path electrically connecting a first wiring and a second wiring; a second metal region mainly composed of a metal selected from the group consisting of tin, a tin-copper alloy, and a tin-copper intermetallic compound; a third metal region mainly composed of bismuth; and a fourth metal region composed of tin-bismuth solder particles. The link has plane-to-plane contact portions where the copper particles are in plane-to-plane contact with one another. At least a part of the second metal region is in contact with the first metal region. The tin-bismuth solder particles, each surrounded by the resin portion, are interspersed in the via-hole conductor.Type: ApplicationFiled: December 19, 2011Publication date: March 21, 2013Applicants: KYOTO ELEX CO., LTD., PANASONIC CORPORATIONInventors: Shogo Hirai, Tsuyoshi Himori, Hiroyuki Ishitomi, Takayuki Higuchi, Satoru Tomekawa, Yutaka Nakayama
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Publication number: 20130062107Abstract: Disclosed is a multilayer wiring board having via-hole conductors for connecting a first copper wiring and a second copper wiring, the via-hole conductor including a metal portion and a resin portion. The metal portion includes a first metal region including a link of copper particles as a path for electrically connecting the first and second copper wirings; a second metal region mainly composed of at least one selected from tin, a tin-copper alloy, and a tin-copper intermetallic compound; and a third region mainly composed of bismuth. The copper particles forming the link are in plane-to-plane contact with one another. At least one of the first copper wiring and the second copper wiring is in plane-to-plane contact with the copper particles, and the portion where there is such a plane-to-plane contact is covered with at least a part of the second metal region.Type: ApplicationFiled: December 9, 2011Publication date: March 14, 2013Applicant: PANASONIC CORPORATIONInventors: Takayuki Higuchi, Shogo Hirai, Tsuyoshi Himori, Hiroyuki Ishitomi
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Publication number: 20130008698Abstract: A multilayer wiring board having via-hole conductors which electrically connects a plurality of wirings arranged in a manner such that an insulating resin layer is placed between the wirings, wherein: the via-hole conductors each include copper, tin, and bismuth, namely, a first metal region including a link of copper particles in plane-to-plane contact with one another, the link electrically connecting the wirings, a second metal region mainly composed of one or more of tin, a tin-copper alloy, and a tin-copper intermetallic compound, and a third metal region mainly composed of bismuth; at least a part of the second metal region is in contact with the surface of the copper particles, the surface excluding the area of the plane-to-plane contact portion of the link; and the Cu, Sn, and Bi in the metal portion are of a composition having a specific weight ratio (Cu:Sn:Bi).Type: ApplicationFiled: December 6, 2011Publication date: January 10, 2013Applicant: PANASONIC CORPORATIONInventors: Tsuyoshi Himori, Shogo Hirai, Takayuki Higuchi, Satoru Tomekawa, Yutaka Nakayama
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Patent number: 8134082Abstract: A solid printed circuit board is manufactured by bonding upper and lower printed circuit boards having different shapes and provided with wirings formed on surfaces thereof. A bonding layer is made of insulating material containing thermosetting resin and inorganic filler dispersed therein, and has a via-conductor made of conductive paste filling a through-hole perforated in a predetermined position of the bonding layer. This circuit board provides a packaging configuration achieving small size and thickness and three-dimensional mounting suitable for semiconductors of high performance and multiple-pin structure.Type: GrantFiled: May 28, 2008Date of Patent: March 13, 2012Assignee: Panasonic CorporationInventors: Tadashi Nakamura, Fumio Echigo, Takayuki Kita, Kota Fukasawa, Shogo Hirai
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Patent number: 8076589Abstract: A multilayer wiring board employs a thin insulating substrate having substantially only resin flow as the compression property effect, and has an any-layer IVH structure where at least one core layer is formed without burying wiring. For sufficiently securing an effective compression amount of the crush-allowance of a conductor, the ratio of the thickness of a cover film to that of the electrical insulating substrate is increased, and a via can be formed in the core layer without burying the wiring in the insulating substrate. Thus, a multilayer wiring board having an any-layer IVH structure that can achieve high-density component mountability and wiring storability in an extremely small thickness can be provided.Type: GrantFiled: April 26, 2006Date of Patent: December 13, 2011Assignee: Panasonic CorporationInventors: Tadashi Nakamura, Fumio Echigo, Shogo Hirai
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Publication number: 20110290549Abstract: A wiring board includes a plurality of wirings laid via an insulating resin layer, and a via-hole conductor provided for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes a region made of copper particles, a first metal region mainly composed of tin, a tin-copper alloy, or a tin-copper intermetallic compound, and a second metal region mainly composed of bismuth, and has Cu/Sn of from 1.59 to 21.43. The copper particles are in contact with one another, thereby electrically connecting the wirings, and at least part of the first metal region covers around and extends over the portions where the copper particles are in plane contact with one another.Type: ApplicationFiled: February 22, 2011Publication date: December 1, 2011Inventors: Shogo Hirai, Hiroyuki Ishitomi, Tsuyoshi Himori, Satoru Tomekawa, Yutaka Nakayama
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Publication number: 20110278051Abstract: A multilayer wiring board includes an insulating resin layer, wirings laid on their respective opposite surfaces of the insulating resin layer, and a via-hole conductor for electrically connecting the wirings. The via-hole conductor includes metal and resin portions. The metal portion includes first metal regions including a joined unit made of copper particles for connecting the wirings, second metal regions mainly composed of, for example, tin, a tin-copper alloy, or a tin-copper intermetallic compound, and third metal regions mainly composed of bismuth and in contact with the second metal regions. The copper particles forming the joined unit are in plane contact with one another to form plane contact portions, and the second metal regions at least partially are in contact with the first metal regions.Type: ApplicationFiled: February 22, 2011Publication date: November 17, 2011Inventors: Tsuyoshi Himori, Shogo Hirai, Hiroyuki Ishitomi, Satoru Tomekawa, Yutaka Nakayama
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Patent number: 7956293Abstract: A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.Type: GrantFiled: April 2, 2007Date of Patent: June 7, 2011Assignee: Panasonic CorporationInventors: Fumio Echigo, Shogo Hirai, Tadashi Nakamura
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Publication number: 20110030207Abstract: A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.Type: ApplicationFiled: October 19, 2010Publication date: February 10, 2011Applicant: Panasonic CorporationInventors: Fumio ECHIGO, Shogo HIRAI, Tadashi NAKAMURA
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Publication number: 20100170700Abstract: A solid printed circuit board is manufactured by bonding upper and lower printed circuit boards having different shapes and provided with wirings formed on surfaces thereof. A bonding layer is made of insulating material containing thermosetting resin and inorganic filler dispersed therein, and has a via-conductor made of conductive paste filling a through-hole perforated in a predetermined position of the bonding layer. This circuit board provides a packaging configuration achieving small size and thickness and three-dimensional mounting suitable for semiconductors of high performance and multiple-pin structure.Type: ApplicationFiled: May 28, 2008Publication date: July 8, 2010Applicant: Panasonic CorporationInventors: Tadashi Nakamura, Fumio Echigo, Takayuki Kita, Kota Fukasawa, Shogo Hirai
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Publication number: 20090229862Abstract: A plurality of double-sided boards using a film are attached to each other with a paste coupling layer sandwiched therebetween. In the paste coupling layer, a conductive paste is filled into a through hole formed in provisionally hardened resin, which is hardened. At the same time, second wirings are electrically coupled to each other by using the hardened conductive paste filled in the through holes that have been previously formed in the paste coupling layer. Thus, it is possible to provide a thinned multilayer printed wiring board without using an adhesive.Type: ApplicationFiled: November 7, 2006Publication date: September 17, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Tadashi Nakamura, Fumio Echigo, Shogo Hirai, Toshio Sugawa
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Publication number: 20090139761Abstract: A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.Type: ApplicationFiled: April 2, 2007Publication date: June 4, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Fumio Echigo, Shogo Hirai, Tadashi Nakamura
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Patent number: 7510759Abstract: An electronic component includes conductive pattern (2) on insulating substrate (1), a metal film formed by a plating method on a surface of conductive pattern (2), and metal oxide layer (3) formed by oxidizing the metal film on the surface of conductive pattern (2). This structure allows forming a thin and uniform insulating film on conductive pattern (2), so that the highly reliable electric component is obtainable although its conductive pattern (2) has a high aspect ratio.Type: GrantFiled: November 29, 2004Date of Patent: March 31, 2009Assignee: Panasonic CorporationInventors: Tsuyoshi Himori, Shogo Hirai
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Publication number: 20080308304Abstract: A multilayer wiring board employs a thin insulating substrate having substantially only resin flow as the compression property effect, and has an any-layer IVH structure where at least one core layer is formed without burying wiring. For sufficiently securing an effective compression amount of the crush-allowance of a conductor, the ratio of the thickness of a cover film to that of the electrical insulating substrate is increased, and a via can be formed in the core layer without burying the wiring in the insulating substrate. Thus, a multilayer wiring board having an any-layer IVH structure that can achieve high-density component mountability and wiring storability in an extremely small thickness can be provided.Type: ApplicationFiled: April 26, 2006Publication date: December 18, 2008Inventors: Tadashi Nakamura, Fumio Echigo, Shogo Hirai
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Publication number: 20080121416Abstract: In a case of multilayer circuit boards where a plurality of conventional films are used as insulating layers, the films are connected with each other using an adhesive, and therefore, the adhesive sometimes negatively affects reduction in thickness. Therefore, a plurality of two-sided boards with films used therein are pasted together with a paste connection layer interposed therebetween, the paste connection layer being configured such that through holes formed in a prepreg are filled in with a conductive paste which is then cured, and second wires are electrically connected with each other through the conductive paste with which the through holes formed in the paste connection layer in advance are filled in, and thus, a multilayer board can be provided without using an adhesive, and the entirety of the multilayer circuit board can be reduced in thickness.Type: ApplicationFiled: October 19, 2006Publication date: May 29, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Shogo Hirai, Fumio Echigo, Tadashi Nakamura, Toshio Sugawa
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Publication number: 20060118905Abstract: An electronic component includes conductive pattern (2) on insulating substrate (1), a metal film formed by a plating method on a surface of conductive pattern (2), and metal oxide layer (3) formed by oxidizing the metal film on the surface of conductive pattern (2). This structure allows forming a thin and uniform insulating film on conductive pattern (2), so that the highly reliable electric component is obtainable although its conductive pattern (2) has a high aspect ratio.Type: ApplicationFiled: November 29, 2004Publication date: June 8, 2006Inventors: Tsuyoshi Himori, Shogo Hirai