Abstract: Provided is a semiconductor element including at least, a semiconductor layer including a crystalline oxide semiconductor as a major component; an electrode layer laminated on the semiconductor layer; and a conductive substrate laminated on the electrode layer directly or with another layer in between, the conductive substrate containing at least a first metal selected from the metals in group 11 in the periodic table and a second metal different from the first metal in coefficient of liner thermal expansion.

Abstract: Provided is a power conversion device converting power and supplying the converted power to a load, the power conversion device including: a power conversion circuit connected to the load and configured to supply/receive the power; a coil configured to detect a current passing through the power conversion circuit and to output a voltage corresponding to the detected current; an integration circuit configured to integrate the voltage output from the coil to generate a voltage signal corresponding to a variation of the current; and a control device configured to generate a control signal to the power conversion circuit based on the voltage signal output from the integration circuit.

Abstract: Provided is a semiconductor device, including: a first electrode layer including a first wiring member and a second electrode layer including a second wiring member, the first electrode layer and the second electrode layer being disposed to face each other; a semiconductor element disposed in a gap between the first and second electrode layers, and electrically connected to the first and second electrode layers; and a via disposed in the gap between the first and second electrode layers, electrically connected to the first and second electrode layers, and configured to detect a state of the semiconductor element by being fractured at a predetermined temperature and losing electric connection.

Abstract: A method of manufacturing a printed circuit board is disclosed. A seed layer is removed while etching of a circuit pattern is prevented. In a printed circuit board manufacturing process according to a semi-additive method, a seed layer is formed by electroless copper plating. Using a resist pattern, a circuit pattern is formed by electrolytic copper plating. After the formation of the circuit pattern, the exposed regions of seed layer are subjected to etching. According to the invention, an etching liquid at a temperature of about 15° C. or less is used. As a temperature of the etching liquid is lowered, a potential difference between the seed layer and the circuit pattern increases. Due to the increase in potential difference, the seed layer becomes more susceptible to being etched, while the circuit pattern becomes less susceptible to being etched.

Abstract: A multilayered printed wiring board includes two or more layers each having a via hole therein, these holes aligned vertically above one another to minimize board real estate while assuring an effective circuit path between respective points on the two layers. One or both via holes can be filled with either an electrically conductive material (e.g., copper paste) or a nonconductive material (e.g., resin).

Abstract: An electrical connection structure for electrically connecting a chip on a mounting surface of a printed circuit board to a back surface of the printed circuit board includes a printed circuit board having a mounting surface and a back surface, the mounting and back surfaces being opposite surfaces of the printed circuit board, a through hole through the printed circuit board and extending from the mounting to the back surface, an electrical conductive layer between the mounting and back surfaces and a layer that permits wiring over the through hole that is electrically isolated from the electrical conductive layer.

Abstract: A multilayered printed wiring board includes two or more layers each having a via hole therein, these holes aligned vertically above one another to minimize board real estate while assuring an effective circuit path between respective points on the two layers. One or both via holes can be filled with either an electrically conductive material (e.g., copper paste) or a non-conductive material (e.g., resin).