Abstract: Provided is an integrated circuit (41) that operates in normal mode or sleep mode corresponding to the on/off state of a vehicle engine. On the basis of information of setting data information stored in an internal register (42) and information of the on/off state of the vehicle engine from an MPU (50), the integrated circuit (41) generates monitoring signals (INZ0 to INZ7), monitoring signals (INA0 to INA7), and monitoring signals (INB0 to INB5). These monitoring signals enables to monitor states of a head light switch (11), a door switch (12), and a window switch (13). As the switch state monitoring method, intermittent operation or constant monitoring operation is performed.

Abstract: Provided is an integrated circuit (41) that operates in normal mode or sleep mode corresponding to the on/off state of a vehicle engine. On the basis of information of setting data information stored in an internal register (42) and information of the on/off state of the vehicle engine from an MPU (50), the integrated circuit (41) generates monitoring signals (INZ0 to INZ7), monitoring signals (INA0 to INA7), and monitoring signals (INB0 to INB5). These monitoring signals enables to monitor states of a head light switch (11), a door switch (12), and a window switch (13). As the switch state monitoring method, intermittent operation or constant monitoring operation is performed.

Abstract: A semiconductor integrated circuit for monitoring a switch, including: a first detection part that detects a state of a first switch; a second detection part that detects a state of a second switch; a sub-voltage monitoring part that monitors whether the sub-voltage is within a predetermined range; a switch monitoring part that monitors a change in a state of the first switch and a change in a state of the second switch; a setting part that determines an invalid period, during which the monitoring result of the switch monitoring part regarding the change in the state of the second switch is invalidated; and a transmission part that transmits the monitoring result of the switch monitoring part and information on the invalid period.

Abstract: A semiconductor integrated circuit for monitoring a switch, including: a first detection part that detects a state of a first switch; a second detection part that detects a state of a second switch; a sub-voltage monitoring part that monitors whether the sub-voltage is within a predetermined range; a switch monitoring part that monitors a change in a state of the first switch and a change in a state of the second switch; a setting part that determines an invalid period, during which the monitoring result of the switch monitoring part regarding the change in the state of the second switch is invalidated; and a transmission part that transmits the monitoring result of the switch monitoring part and information on the invalid period.

Abstract: To obtain an output image where contrast relating to the luminance of an input image has been adjusted. In an image processing method for adjusting the luminance value of each pixel contained in an input image, first, a closed region ?(x, y) made up of a plurality of pixels in the input image is demarcated as a target region, and the target region is moved within the input image by predetermined pixel units. At this point, a maximum value and a minimum value of luminance energy defined as a luminance arrangement in the target region are calculated, and difference data of the luminance energy is calculated (step S4). Next, the difference data calculated in step S4 is adapted to the input image to generate an output image (step S6).

Abstract: To obtain an output image where contrast relating to the luminance of an input image has been adjusted. In an image processing method for adjusting the luminance value of each pixel contained in an input image, first, a closed region ?(x, y) made up of a plurality of pixels in the input image is demarcated as a target region, and the target region is moved within the input image by predetermined pixel units. At this point, a maximum value and a minimum value of luminance energy defined as a luminance arrangement in the target region are calculated, and difference data of the luminance energy is calculated (step S4). Next, the difference data calculated in step S4 is adapted to the input image to generate an output image (step S6).

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory cell region which is disposed on the semiconductor substrate and has a transistor array of a stacked gate structure having a floating gate, a Ti-containing barrier which is disposed in an upper layer of the memory cell region and covers the memory cell region, and a passivation layer disposed above the Ti-containing barrier.

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory cell region which is disposed on the semiconductor substrate and has a transistor array of a stacked gate structure having a floating gate, a Ti-containing barrier which is disposed in an upper layer of the memory cell region and covers the memory cell region, and a passivation layer disposed above the Ti-containing barrier.

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory cell region which is disposed on the semiconductor substrate and has a transistor array of a stacked gate structure having a floating gate, a Ti-containing barrier which is disposed in an upper layer of the memory cell region and covers the memory cell region, and a passivation layer disposed above the Ti-containing barrier.

Abstract: A nonvolatile semiconductor memory device includes a semiconductor substrate, a memory cell region which is disposed on the semiconductor substrate and has a transistor array of a stacked gate structure having a floating gate, a Ti-containing barrier which is disposed in an upper layer of the memory cell region and covers the memory cell region, and a passivation layer disposed above the Ti-containing barrier.