Patents by Inventor Shohdy Abd Elkader

Shohdy Abd Elkader has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8621402
    Abstract: Various aspects of this disclosure relate to increasing pattern density in a circuit layout design of a circuit layer so as to control the thickness of material in a manufactured integrated circuit. For example, a layer in circuit design may be divided into separate areas, and a target thickness range may be established for all of the tiles in the integrated circuit design. Each area may be analyzed to determine if it has a sufficient pattern density for a thickness estimation model to accurately estimate its expected material thickness upon manufacture. Each tile may be analyzed to determine if the expected thickness for that tile is within the target thickness range.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: December 31, 2013
    Assignee: Mentor Graphics Corporation
    Inventors: Shohdy Abd Elkader, Craig M. Larsen
  • Publication number: 20130139117
    Abstract: Various aspects of this disclosure relate to increasing pattern density in a circuit layout design of a circuit layer so as to control the thickness of material in a manufactured integrated circuit. For example, a layer in circuit design may be divided into separate areas, and a target thickness range may be established for all of the tiles in the integrated circuit design. Each area may be analyzed to determine if it has a sufficient pattern density for a thickness estimation model to accurately estimate its expected material thickness upon manufacture. Each tile may be analyzed to determine if the expected thickness for that tile is within the target thickness range.
    Type: Application
    Filed: September 14, 2012
    Publication date: May 30, 2013
    Applicant: Mentor Graphics Corporation
    Inventors: Shohdy Abd Elkader, Craig M. Larsen
  • Patent number: 8321817
    Abstract: Various aspects of this disclosure relate to increasing pattern density in a circuit layout design of a circuit layer so as to control the thickness of material in a manufactured integrated circuit. For example, a layer in circuit design may be divided into separate areas, and a target thickness range may be established for all of the tiles in the integrated circuit design. Each area may be analyzed to determine if it has a sufficient pattern density for a thickness estimation model to accurately estimate its expected material thickness upon manufacture. Each tile may be analyzed to determine if the expected thickness for that tile is within the target thickness range.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: November 27, 2012
    Assignee: Mentor Graphics Corporation
    Inventors: Shohdy Abd Elkader, Craig M. Larsen
  • Publication number: 20110307844
    Abstract: Various aspects of this disclosure relate to increasing pattern density in a circuit layout design of a circuit layer so as to control the thickness of material in a manufactured integrated circuit. For example, a layer in circuit design may be divided into separate areas, and a target thickness range may be established for all of the tiles in the integrated circuit design. Each area may be analyzed to determine if it has a sufficient pattern density for a thickness estimation model to accurately estimate its expected material thickness upon manufacture. Each tile may be analyzed to determine if the expected thickness for that tile is within the target thickness range.
    Type: Application
    Filed: March 12, 2010
    Publication date: December 15, 2011
    Applicant: Mentor Graphics Corporation
    Inventors: Shohdy Abd Elkader, Craig M. Larsen
  • Publication number: 20110072401
    Abstract: Various aspects of this disclosure relate to increasing pattern density in a circuit layout design of a circuit layer so as to control the thickness of material in a manufactured integrated circuit. For example, a layer in circuit design may be divided into separate areas, and a target thickness range may be established for all of the tiles in the integrated circuit design. Each area may be analyzed to determine if it has a sufficient pattern density for a thickness estimation model to accurately estimate its expected material thickness upon manufacture. Each tile may be analyzed to determine if the expected thickness for that tile is within the target thickness range.
    Type: Application
    Filed: February 19, 2010
    Publication date: March 24, 2011
    Applicant: Mentor Graphics Corporation
    Inventors: Shohdy Abd Elkader, Craig M. Larsen