Abstract: A light emitting element driving device, which flashing-drive a plurality of light emitting element arrays connected in parallel by switching elements connected in series with each of the plurality of light emitting element arrays, the light emitting element driving device including: a current detection unit configured to detect respective currents flowing through each of the plurality of light emitting element arrays as currents of the light emitting element arrays; a selection unit configured to select the smallest current of the light emitting element arrays of the detected currents obtained by the current detection unit; and an output voltage control unit configured to control output voltage supplied to the plurality of light emitting element arrays so that the current of the light emitting element arrays selected by the selection unit becomes a preset reference current value.

Abstract: A method of controlling a power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit determines when to transition the PFC converter between an interleaved mode and a saving energy mode (SEM). The method includes generating an amplified error signal based on a monitored output voltage of the PFC converter. The second PFC sub-circuit is disabled in response to the amplified error signal being less than a first threshold value and enabled in response to the amplified error signal exceeding a second threshold value.

Abstract: A power source apparatus includes a first converter having a reactor L1, a switching element Q1, and a rectifier D1; a second converter connected in parallel with the first converter and having a reactor L2, a switching element Q2, and a rectifier D2; a capacitor C1 connected to output ends of the first and second converters; a current detector R1 detecting a resultant current of currents of the first and second converters; a controller 13 driving the switching element Q1 and the switching element Q2; and a selector. In a case where the resultant current indicates a first reference value, if one of first and second drive signals of the controller is active, the active drive signal is deactivated, and if both the first and second drive signals are active, one of the first and second drive signals that is active longer than the other is deactivated.

Abstract: A power conversion apparatus includes a converter having an input power source Vin, a reactor L1, a switching element Q1, and a rectifying element D1, a smoothing capacitor C1 connected to an output terminal of the converter, and a controller 10b to turn on/off the switching element and thereby control power to be outputted from the converter. The controller has a pulse generator 15 to generate a pulse signal according to an input voltage to the converter and an output voltage from the converter, the pulse signal being used to turn on/off the switching element. The controller also has an adjuster 18 to mask an ON time of the pulse signal for a predetermined time and thereby provide the pulse signal with an adjusted ON time, the adjusted ON time determining a duty ratio at which the switching element is turned on/off.

Abstract: A controller provides frequency compression for an interleaved power factor correction (PFC) converter that determines the ON and OFF times of each switch associated with the PFC converter to prevent operating frequencies in the audible range. The controller includes a first circuit for generating an ON time current source having a magnitude related to an amplified error signal and the monitored input voltage, and a second circuit for generating an OFF time current source having a magnitude related to the ON time current source, the monitored input voltage, and the monitored output voltage. Gate drive circuitry provides gate drives signals to the switches of the interleaved PFC converter at a frequency determined by magnitudes of the ON time current source and the OFF time current source.

Abstract: The present invention provides a method of controlling an interleaved power factor correction (PFC) circuit operating in a discontinuous conduction mode (DCM). The controller employs a normal mode of operation in which inductor currents in each PFC sub-circuit are estimated based on the monitored input voltage and monitored output voltage, and switching devices associated with each PFC sub-circuit are controlled to ensure DCM operation. As the input voltage increases, the OFF times of each PFC sub-circuit increase such that the inductor currents no longer overlap. In response, the controller activates a time-limiting mode (TLM) in which OFF time durations for each sub-circuit are based on the monitored sum of load currents as opposed to the monitored input voltage and monitored output voltage.

Abstract: A capacitive load driver includes a first switching element whose first end receives positive potential, an EL element arranged between a second end of the first switching element and the ground, a charge collecting capacitor whose first end is connected to a positive electrode terminal of the EL element, a voltage source connected between a second end of the charge collecting capacitor and the ground, and a controller. The controller charges a parasitic capacitance of the EL element and the charge collecting capacitor, and thereafter, applies negative potential from the voltage source to the second end of the charge collecting capacitor. Thereafter, the controller brings the output voltage of the voltage source to ground potential so that the charge collecting capacitor is discharged to charge the EL element. The capacitance of the charge collecting capacitor is set to be sufficiently greater than that of the parasitic capacitance.

Abstract: The present invention includes: an input voltage detector detecting an input voltage of a parallel converter and outputting an input voltage signal; an output voltage detector detecting an output voltage of the parallel converter; and a controller. The controller includes an error amplifier comparing the output voltage signal and a reference voltage and outputting an error amplification signal; an arithmetic operator generating an ON time signal and an OFF time signal based on the input and output voltage signals and the error amplification signal; a phase signal generator generating plural phase signals having different phases based on the ON and OFF time signals and the error amplification signal; a pulse generator generating plural pulse-train signals synchronized with the respective phase signals based on the ON time signal, the error amplification signal and the phase signals; and a driver driving the switching units in accordance with the pulse-train signals.

Abstract: A power factor correction circuit includes a first rectifier to rectify an AC voltage, a series circuit connected to an output of the first rectifier and including a step-up reactor and a switching element, a rectifying-smoothing circuit connected to both ends of the switching element and including a second rectifier and a smoothing capacitor, an input voltage detector to detect an output voltage of the first rectifier, an output voltage detector to detect a voltage across the smoothing capacitor, an error amplifier to amplify an error between the output voltage signal and a reference voltage, and a controller to determine an ON/OFF duty ratio of the switching element according to the amplified error signal and a result of a calculation carried out on the input voltage signal and output voltage signal.

Abstract: A DC-DC converter includes: a first series circuit in which a resonance reactor, a primary winding of a transformer, and a switching element are connected in series, the first series circuit being connected to both ends of a direct current power supply; a second series circuit in which a first rectifier, a current resonance capacitor, and a secondary winding of the transformer are connected in series, the second series circuit being connected to both ends of the direct current power supply; a rectifying/smoothing circuit having a second rectifier and a smoothing capacitor and connected to both ends of a series circuit of the current resonance capacitor and the secondary winding of the transformer; an output voltage detection circuit that detects an output voltage of the rectifying/smoothing circuit; and a control circuit that turns on and off the switching element based on an output voltage signal from the output voltage detection circuit.

Abstract: A level-shift circuit converts a first voltage level into a second voltage level different from the first voltage level. The level-shift circuit includes a first high-side signal detection circuit, a second high-side signal detection circuit, a drive circuit and electric current detection circuits. The first high-side signal detection circuit sets a logical voltage state of the second voltage level via a first capacitor. The second high-side signal detection circuit resets the logical voltage state of the second voltage level via a second capacitor. The drive circuit on-off drives a high-side switch connected to a low-side switch in series by a set signal of the first high-side signal detection circuit and a reset signal of the second high-side signal detection circuit. The electric current detection circuits detect an electric current flowing into or from the first and/or second capacitors.

Abstract: The present invention provides a method of controlling an interleaved power factor correction (PFC) circuit operating in a discontinuous conduction mode (DCM). The controller employs a normal mode of operation in which inductor currents in each PFC sub-circuit are estimated based on the monitored input voltage and monitored output voltage, and switching devices associated with each PFC sub-circuit are controlled to ensure DCM operation. As the input voltage increases, the OFF times of each PFC sub-circuit increase such that the inductor currents no longer overlap. In response, the controller activates a time-limiting mode (TLM) in which OFF time durations for each sub-circuit are based on the monitored sum of load currents as opposed to the monitored input voltage and monitored output voltage.

Abstract: A controller provides frequency compression for an interleaved power factor correction (PFC) converter that determines the ON and OFF times of each switch associated with the PFC converter to prevent operating frequencies in the audible range. The controller includes a first circuit for generating an ON time current source having a magnitude related to an amplified error signal and the monitored input voltage, and a second circuit for generating an OFF time current source having a magnitude related to the ON time current source, the monitored input voltage, and the monitored output voltage. Gate drive circuitry provides gate drives signals to the switches of the interleaved PFC converter at a frequency determined by magnitudes of the ON time current source and the OFF time current source.

Abstract: A method of controlling a power factor correction (PFC) converter having a first PFC sub-circuit and a second PFC sub-circuit determines when to transition the PFC converter between an interleaved mode and a saving energy mode (SEM). The method includes generating an amplified error signal based on a monitored output voltage of the PFC converter. The second PFC sub-circuit is disabled in response to the amplified error signal being less than a first threshold value and enabled in response to the amplified error signal exceeding a second threshold value.

Abstract: A capacitive load driver includes a first switching element whose first end receives positive potential, an EL element arranged between a second end of the first switching element and the ground, a charge collecting capacitor whose first end is connected to a positive electrode terminal of the EL element, a voltage source connected between a second end of the charge collecting capacitor and the ground, and a controller. The controller charges a parasitic capacitance of the EL element and the charge collecting capacitor, and thereafter, applies negative potential from the voltage source to the second end of the charge collecting capacitor. Thereafter, the controller brings the output voltage of the voltage source to ground potential so that the charge collecting capacitor is discharged to charge the EL element. The capacitance of the charge collecting capacitor is set to be sufficiently greater than that of the parasitic capacitance.

Abstract: A power conversion apparatus includes a converter having an input power source Vin, a reactor L1, a switching element Q1, and a rectifying element D1, a smoothing capacitor C1 connected to an output terminal of the converter, and a controller 10b to turn on/off the switching element and thereby control power to be outputted from the converter. The controller has a pulse generator 15 to generate a pulse signal according to an input voltage to the converter and an output voltage from the converter, the pulse signal being used to turn on/off the switching element. The controller also has an adjuster 18 to mask an ON time of the pulse signal for a predetermined time and thereby provide the pulse signal with an adjusted ON time, the adjusted ON time determining a duty ratio at which the switching element is turned on/off.

Abstract: A level shift circuit shifts a first voltage level to a second voltage level that is different from the first voltage level. The level shift circuit includes a set-level circuit 21 configured to detect and transmit a set signal that is used to set a logic voltage state based on the second voltage level, a reset-level circuit 22 configured to detect and transmit a reset signal that is used to reset the logic voltage state based on the second voltage level, and a reference-level circuit C3 configured to provide a reference signal that is used to detect the set signal and reset signal based on the second voltage level. The set-level circuit, reset-level circuit, and reference-level circuit transmit signals from the first voltage level to the second voltage level through capacitors C1, C2, and C3, respectively.

Abstract: A capacitive light emitting device includes: a capacitive light emitting device 1 placed between a cathode electrode and an anode electrode opposite to each other on a light-transmitting substrate; a power supply Vin connected to the capacitive light emitting device; drive means 10 for driving the capacitive light emitting device by applying a DC voltage of the power supply between the cathode electrode and the anode electrode; and regeneration means L2, Q3 for returning electric charges to the power supply for regeneration, the electric charges being accumulated in a parasitic capacitance of the capacitive light emitting device while the capacitive light emitting device is driven.

Abstract: The present invention includes: an input voltage detector detecting an input voltage of a parallel converter and outputting an input voltage signal; an output voltage detector detecting an output voltage of the parallel converter; and a controller. The controller includes an error amplifier comparing the output voltage signal and a reference voltage and outputting an error amplification signal; an arithmetic operator generating an ON time signal and an OFF time signal based on the input and output voltage signals and the error amplification signal; a phase signal generator generating plural phase signals having different phases based on the ON and OFF time signals and the error amplification signal; a pulse generator generating plural pulse-train signals synchronized with the respective phase signals based on the ON time signal, the error amplification signal and the phase signals; and a driver driving the switching units in accordance with the pulse-train signals.

Abstract: A power source apparatus includes a first converter having a reactor L1, a switching element Q1, and a rectifier D1; a second converter connected in parallel with the first converter and having a reactor L2, a switching element Q2, and a rectifier D2; a capacitor C1 connected to output ends of the first and second converters; a current detector R1 detecting a resultant current of currents of the first and second converters; a controller 13 driving the switching element Q1 and the switching element Q2; and a selector. In a case where the resultant current indicates a first reference value, if one of first and second drive signals of the controller is active, the active drive signal is deactivated, and if both the first and second drive signals are active, one of the first and second drive signals that is active longer than the other is deactivated.