Patents by Inventor Shohei Shimahara

Shohei Shimahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8904201
    Abstract: At the time of a fan failure of a plurality of fans for cooling redundant controllers, data loss can be avoided even if a power source of each controller is controlled. A storage system includes: a first controller for controlling a first power source; a plurality of first fans for cooling the first controller; a second controller for controlling a second power source; a plurality of second fans for cooling the second controller; and a storage device including a plurality of storage units; wherein if a fan failure of the first fans occurs, the first controller controls the first power source in a standby state on condition that the second controller is in a normal state; and if the second power source is in the standby state, the first controller executes destaging processing and then controls the first power source in the standby state.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: December 2, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Shohei Shimahara
  • Publication number: 20140136648
    Abstract: A controller is able to specify one of multiple protocols, and to operate a network interface using the specified protocol. A storage apparatus comprises a network interface part, which is coupled to a computer via a network, and a controller, which is coupled to the network interface part, receives a request from the computer via the network and the network interface part, and accesses a storage medium on the basis of the request. The controller specifies one protocol from among multiple protocols, and sends protocol information denoting the specified protocol to the network interface part. The network interface part configures a protocol denoted by the protocol information, and carries out communications with the network in accordance with the configured protocol.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: HITACHI, LTD.
    Inventors: Masateru Hemmi, Yuta Saito, Sophanna Tang, Shohei Shimahara
  • Publication number: 20130080796
    Abstract: At the time of a fan failure of a plurality of fans for cooling redundant controllers, data loss can be avoided even if a power source of each controller is controlled. A storage system includes: a first controller for controlling a first power source; a plurality of first fans for cooling the first controller; a second controller for controlling a second power source; a plurality of second fans for cooling the second controller; and a storage device including a plurality of storage units; wherein if a fan failure of the first fans occurs, the first controller controls the first power source in a standby state on condition that the second controller is in a normal state; and if the second power source is in the standby state, the first controller executes destaging processing and then controls the first power source in the standby state.
    Type: Application
    Filed: September 26, 2011
    Publication date: March 28, 2013
    Inventors: Ryosuke Matsubara, Hiroki Kanai, Shohei Shimahara
  • Publication number: 20110282963
    Abstract: Disclosed is a storage device 10 in which CPUs 132 are redundantly configured, and which is thus capable of performing dual-writing of data into cache memories 134 respectively coupled to the CPUs 132. In the storage device 10, general-purpose processors each including an NTB_Port 72, PCI_Ports 73 and a Memory_I/F 74 are used as CPUs 132 of the CPUs 132. In the storage device 10, when a first PCIe_Port 73 determines not to perform the dual-writing, a first NTB_Port 1322 writes data into only one of the cache memories 134, and when the first PCIe_Port 73 determines to perform the dual-writing, the first NTB_Port 1322 writes data into one of the cache memories 134 while writing the data into the other one of the cache memories 134 via the other one of the CPUs 132.
    Type: Application
    Filed: May 11, 2010
    Publication date: November 17, 2011
    Applicant: HITACHI, LTD.
    Inventors: Shohei Shimahara, Hiroki Kanai, Ryosuke Matsubara
  • Patent number: D847099
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: April 30, 2019
    Assignee: OMRON Corporation
    Inventors: Takuya Nakada, Yukiyoshi Yamamoto, Aiki Kora, Shohei Shimahara, Koyuru Nakano, Tadahiko Ogawa