Patents by Inventor Shoichi Kobayashi

Shoichi Kobayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10783219
    Abstract: A distributed equipment abnormality detection system is provided for monitoring physical amounts of equipments of identical type and detecting an abnormality of each equipment. The distributed equipment abnormality detection system includes equipment management apparatuses that manage the equipments; and a management server apparatus for communicating the equipment management apparatuses.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: September 22, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shoichi Kobayashi, Toshihiro Wada, Tomoki Takegami
  • Patent number: 10319587
    Abstract: A method of manufacturing an epitaxial wafer having an epitaxial layer on a silicon-based substrate, the method of manufacturing the epitaxial wafer including epitaxially growing a semiconductor layer on the silicon-based substrate after applying terrace processing to an outer peripheral portion of the silicon-based substrate. As a result, the method of manufacturing the epitaxial wafer having the epitaxial layer on the silicon-based substrate in which an epitaxial wafer which is completely free from cracks can be obtained, is provided.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: June 11, 2019
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto
  • Publication number: 20190105624
    Abstract: Disclosed herein is a method for producing a raw material having foam-forming properties and/or emulsion-forming properties by causing a lipase to act on an oil/fat in a low moisture state; and a product thereof. As disclosed, an oil/fat, or an oil/fat and a carbohydrate, is reacted with a lipase in a low moisture state, that is, in a state in which a moisture content relative to a dry weight of the oil/fat is 4 to 400 [d.b.%] (an added quantity of water is 2 to 200 ?L relative to 50 mg of the oil/fat), thereby producing a carbohydrate-oil/fat-lipase reaction product of a precursor material having latent foam-forming properties and emulsion-forming properties, and an alkaline component or material is added to the precursor material having latent foam-forming properties and emulsion-forming properties, and the obtained mixture is foamed, emulsified or powdered, thereby producing a product in which the entire reaction product can be used as a food material.
    Type: Application
    Filed: October 9, 2017
    Publication date: April 11, 2019
    Inventors: Shoichi Kobayashi, Yuji Kobayashi
  • Publication number: 20190011506
    Abstract: A first classification circuit obtains first measured values from each of devices, the first measured values of the device including at least one input value to the device and at least one output value from the device, and classifies the first measured values of the devices into normal first measured values and outlier first measured values using the OCSVM (One Class nu-Support Vector Machine). A second classification circuit obtains second measured values from each of devices, the second measured values of the device including at least one input value to the device, and classifies the second measured values of the devices into normal second measured values and outlier second measured values using the OCSVM. A determination circuit determines a device having the outlier first measured values and the normal second measured values, to be a malfunctioning device.
    Type: Application
    Filed: December 1, 2016
    Publication date: January 10, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shoichi KOBAYASHI, Wataru TSUJITA, Toshihiro WADA, Tomoki TAKEGAMI
  • Publication number: 20180245240
    Abstract: A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.
    Type: Application
    Filed: February 22, 2018
    Publication date: August 30, 2018
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori HAGIMOTO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Hirokazu GOTO, Ken SATO, Hiroshi SHIKAUCHI, Shoichi KOBAYASHI, Hirotaka KURIMOTO
  • Publication number: 20180143942
    Abstract: A distributed equipment abnormality detection system is provided for monitoring physical amounts of equipments of identical type and detecting an abnormality of each equipment. The distributed equipment abnormality detection system includes equipment management apparatuses that manage the equipments; and a management server apparatus for communicating the equipment management apparatuses.
    Type: Application
    Filed: June 21, 2016
    Publication date: May 24, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shoichi KOBAYASHI, Toshihiro WADA, Tomoki TAKEGAMI
  • Patent number: 9966753
    Abstract: An apparatus for predicting an operating time in a power device includes an operating characteristic parameter estimating unit, and only the operation historical data in the vicinity of a current operation environmental condition is extracted and input by a vicinity operation historical data extracting unit.
    Type: Grant
    Filed: February 2, 2011
    Date of Patent: May 8, 2018
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shoichi Kobayashi, Hiroyuki Tsutada, Masahiro Shikai, Tomohito Mori
  • Patent number: 9938638
    Abstract: A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: April 10, 2018
    Assignee: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori Hagimoto, Masaru Shinomiya, Keitaro Tsuchiya, Hirokazu Goto, Ken Sato, Hiroshi Shikauchi, Shoichi Kobayashi, Hirotaka Kurimoto
  • Patent number: 9779892
    Abstract: A target pole-close timing determining unit corrects a breaker characteristic correction signal of a preceding turn-on phase by using a correction amount which is proportional to an absolute value of the interpolar voltage upon turn-on of the proceeding turn-on phase, and a correction amount which is proportional to an elapsed time after a target pole-close timing of the preceding turn-on phase, to generate a subsequent phase interpolar voltage signal, and determines a target pole-close timing of the subsequent turn-on phase at a timing when the subsequent phase interpolar voltage signal is equal to or smaller than a threshold value.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: October 3, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shoichi Kobayashi, Takashi Shindoi, Kenji Inomata, Tomohito Mori, Daigo Matsumoto, Aya Yamamoto
  • Patent number: 9620969
    Abstract: A storage battery equalization device is provided with: a battery pack including a plurality of storage battery modules; a plurality of equalization circuits corresponding to the respective storage battery modules, each including a DC/AC mutual converter circuit, a variable capacitor, and a transformer; external wirings interconnecting secondary windings of the transformers; voltage monitors each being connected across both electrodes of a corresponding storage battery module; and an equalization control unit.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: April 11, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shoichi Kobayashi, Takashi Shindoi, Hiroshi Araki, Kenji Inomata, Toshihiro Wada, Shoji Yoshioka
  • Publication number: 20170029977
    Abstract: A method for producing a semiconductor epitaxial wafer, including steps of: fabricating an epitaxial wafer by epitaxially growing a semiconductor layer on a silicon-based substrate; observing the outer edge portion of the fabricated epitaxial wafer; and removing portions in which a crack, epitaxial layer peeling, and a reaction mark observed in the step of observing are present. As a result, a method for producing a semiconductor epitaxial wafer in which a completely crack-free semiconductor epitaxial wafer can be obtained, is provided.
    Type: Application
    Filed: February 10, 2015
    Publication date: February 2, 2017
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori HAGIMOTO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Hirokazu GOTO, Ken SATO, Hiroshi SHIKAUCHI, Shoichi KOBAYASHI, Hirotaka KURIMOTO
  • Publication number: 20160365239
    Abstract: A method of manufacturing an epitaxial wafer having an epitaxial layer on a silicon-based substrate, the method of manufacturing the epitaxial wafer including epitaxially growing a semiconductor layer on the silicon-based substrate after applying terrace processing to an outer peripheral portion of the silicon-based substrate. As a result, the method of manufacturing the epitaxial wafer having the epitaxial layer on the silicon-based substrate in which an epitaxial wafer which is completely free from cracks can be obtained, is provided.
    Type: Application
    Filed: February 10, 2015
    Publication date: December 15, 2016
    Applicant: SHIN-ETSU HANDOTAI CO., LTD.
    Inventors: Kazunori HAGIMOTO, Masaru SHINOMIYA, Keitaro TSUCHIYA, Hirokazu GOTO, Ken SATO, Hiroshi SHIKAUCHI, Shoichi KOBAYASHI, Hirotaka KURIMOTO
  • Publication number: 20160225548
    Abstract: A power switching control apparatus includes a voltage measurement unit that measures a power-source side voltage and a transmission-line side voltage of a circuit breaker, a voltage estimation unit that estimates a power-source side voltage estimate value and a transmission-line side voltage estimate value according to measurement values, and a target closing time calculation unit that calculates a target closing time according to the estimate values. The target closing time calculation unit calculates an interpolar voltage estimate value by using both the power-source side and the transmission-line side voltage estimate value, calculates an electric turn-on time range, which is the maximum variation range of an electric turn-on time of the circuit breaker, calculates a maximum value of interpolar voltage, and determines that a time at which the maximum value of the interpolar voltage is not more than a threshold and achieves the local minimum value be a target closing time.
    Type: Application
    Filed: October 15, 2013
    Publication date: August 4, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Tomohito MORI, Aya YAMAMOTO, Daigo MATSUMOTO, Takashi SHINDOI, Shoichi KOBAYASHI
  • Publication number: 20150357843
    Abstract: A storage battery equalization device is provided with: a battery pack including a plurality of storage battery modules; a plurality of equalization circuits corresponding to the respective storage battery modules, each including a DC/AC mutual converter circuit, a variable capacitor, and a transformer; external wirings interconnecting secondary windings of the transformers; voltage monitors each being connected across both electrodes of a corresponding storage battery module; and an equalization control unit.
    Type: Application
    Filed: September 17, 2013
    Publication date: December 10, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shoichi KOBAYASHI, Takashi SHINDOI, Hiroshi ARAKI, Kenji INOMATA, Toshihiro WADA, Shoji YOSHIOKA
  • Publication number: 20150294814
    Abstract: A target pole-close timing determining unit corrects a breaker characteristic correction signal of a preceding turn-on phase by using a correction amount which is proportional to an absolute value of the interpolar voltage upon turn-on of the proceeding turn-on phase, and a correction amount which is proportional to an elapsed time after a target pole-close timing of the preceding turn-on phase, to generate a subsequent phase interpolar voltage signal, and determines a target pole-close timing of the subsequent turn-on phase at a timing when the subsequent phase interpolar voltage signal is equal to or smaller than a threshold value.
    Type: Application
    Filed: December 14, 2012
    Publication date: October 15, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Shoichi Kobayashi, Takashi Shindoi, Kenji Inomata, Tomohito Mori, Daigo Matsumoto, Aya Yamamoto
  • Publication number: 20130334468
    Abstract: The present invention provides a method for manufacturing a negative electrode material for a nonaqueous electrolyte secondary battery, which includes the steps of: preparing silicon nanoparticles; manufacturing the silicon-carbon composite material that contains the silicon nanoparticles and a carbonaceous material; and heat-compressing the silicon-carbon composite material. As a result, there is provided a negative electrode material for a nonaqueous electrolyte secondary battery, which has a high capacity and excellent initial charge/discharge efficiency and cycle characteristics and a method for manufacturing the same, and a nonaqueous electrolyte secondary battery that uses the negative electrode material for a nonaqueous electrolyte secondary battery.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 19, 2013
    Inventors: Kazuyuki TANIGUCHI, Tetsuo NAKANISHI, Katsuyuki ISOGAI, Shoichi KOBAYASHI
  • Publication number: 20130297255
    Abstract: An apparatus for predicting an operating time in a power device includes an operating characteristic parameter estimating unit, and only the operation historical data in the vicinity of a current operation environmental condition is extracted and input by a vicinity operation historical data extracting unit.
    Type: Application
    Filed: February 2, 2011
    Publication date: November 7, 2013
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shoichi Kobayashi, Hiroyuki Tsutada, Masahiro Shikai, Tomohito Mori
  • Patent number: 8482086
    Abstract: A plurality of three-dimensional structure configuring devices, each including an elastic body in which micro three-dimensional structure elements fixed to a substrate member are placed so as to be covered therewith and which is fixed to the substrate member, are placed within a film-like elastic body with the substrate members thereof spaced apart from one another so as to configure a three-dimensional structure. Thereby, the plurality of three-dimensional structure configuring devices can be placed with desired intervals of arrangement and in desired positions within the film-like elastic body and so that various specifications can be addressed.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: July 9, 2013
    Assignees: The University of Tokyo, Panasonic Corporation
    Inventors: Isao Shimoyama, Kiyoshi Matsumoto, Eiji Iwase, Akihito Nakai, Binh Khiem Nguyen, Yusuke Tanaka, Shuji Hachitani, Tohru Nakamura, Shoichi Kobayashi
  • Patent number: 8440089
    Abstract: A plurality of micro three-dimensional structure elements each having a movable structure fixed on a sacrifice layer, and fixation portions of the micro three-dimensional structure elements for the sacrifice layer are arranged into a film-like elastic body, and then the sacrifice layer is removed. Thus, a three-dimensional structure in which the individual micro three-dimensional structure elements are arranged independently of one another within the elastic body is manufactured.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: May 14, 2013
    Assignee: Panasonic Corporation
    Inventors: Isao Shimoyama, Kiyoshi Matsumoto, Kazunori Hoshino, Kentaro Noda, Shuji Hachitani, Hidehiro Yoshida, Shoichi Kobayashi, Tohru Nakamura
  • Patent number: D663334
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: July 10, 2012
    Assignee: Panasonic Corporation
    Inventors: Yukihiko Kitano, Shoichi Kobayashi, Mizuho Sakakibara, Hajime Kawano, Tatsuo Sakai, Hiroyuki Uematsu, Shintaro Kinoshita, Ryosuke Murai