Patents by Inventor Shoichi Tsujita

Shoichi Tsujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8161225
    Abstract: A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.
    Type: Grant
    Filed: August 3, 2004
    Date of Patent: April 17, 2012
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Shinji Inoue, Yoshiho Gotoh, Jun Ohara, Masahiro Nakanishi, Shoichi Tsujita, Tomoaki Izumi, Tetsushi Kasahara, Kazuaki Tamura, Kiminori Matsuno, Koichi Horiuchi, Manabu Inoue, Makoto Ochi
  • Patent number: 7654466
    Abstract: A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: February 2, 2010
    Assignee: Panasonic Corporation
    Inventors: Takuji Maeda, Shinji Inoue, Yoshiho Gotoh, Jun Ohara, Masahiro Nakanishi, Shoichi Tsujita, Tomoaki Izumi, Tetsushi Kasahara, Kazuaki Tamura, Kiminori Matsuno, Koichi Horiuchi, Manabu Inoue
  • Publication number: 20080288710
    Abstract: A card information storage part (119) is provided in a semiconductor memory device (110) to store information of the characteristics of the semiconductor memory device (110). There is also provided a file system interface control part (120) for performing, based on the stored characteristic information, a file access suitable for the characteristics of the semiconductor memory device (110). This allows an access device (100) to perform an optimum file access via the file system interface control part (120) without awareness of the characteristics of the semiconductor memory device (110).
    Type: Application
    Filed: January 24, 2005
    Publication date: November 20, 2008
    Inventors: Takuji Maeda, Shinji Inoue, Shoichi Tsujita, Yoshiho Gotoh, Jun Ohara, Kiminori Matsuno, Kazuaki Tamura
  • Publication number: 20070183179
    Abstract: A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.
    Type: Application
    Filed: August 3, 2004
    Publication date: August 9, 2007
    Inventors: Takuji Maeda, Shinji Inoue, Yoshiho Gotoh, Jun Ohara, Masahiro Nakanishi, Shoichi Tsujita, Tomoaki Izumi, Tetsushi Kasahara, Kazuaki Tamura, Kiminori Matsuno, Koichi Horiuchi, Manabu Inoue, Makoto Ochi
  • Publication number: 20070162707
    Abstract: The data processing apparatus (200) holds information about free area which enables writing at specific or more speed in a recording area of an information recording medium (100) including the recording area composed of plural blocks, in a valid free area manager (240) A free area which enables writing at specific or more speed is a block including more than a specified number of unused clusters. The data processing apparatus (200), when necessary to record data to a new free area in the information recording medium (100), refers to the information held in the valid free area manager (240), searches for a free area, and writes data into the searched area.
    Type: Application
    Filed: November 30, 2004
    Publication date: July 12, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hirokazu So, Takuji Maeda, Hiroya Kusaka, Shoichi Tsujita, Shinji Inoue
  • Publication number: 20060221719
    Abstract: A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.
    Type: Application
    Filed: September 13, 2004
    Publication date: October 5, 2006
    Inventors: Takuji Maeda, Shinji Inoue, Yoshiho Gotoh, Jun Ohara, Masahiro Nakanishi, Shoichi Tsujita, Tomoaki Izumi, Tetsushi Kasahara, Kazuaki Tamura, Kiminori Matsuno, Koichi Horiuchi, Manabu Inoue
  • Publication number: 20060007738
    Abstract: In a storage medium which has a number of areas, access to any area is controlled in accordance with whether or not access to another area is possible, and thereby, destruction of data due to malfunctioning or a wrong operation is prevented. A link control part which controls access to the second area based on the information on access to the first area is provided, and access to the second area is controlled on the basis of whether or not access to the first area is possible. Control becomes possible, such that access to the second area becomes impossible in the state where access to the first area is impossible, while access to the second area becomes possible in the case where access to the first area is possible.
    Type: Application
    Filed: July 7, 2005
    Publication date: January 12, 2006
    Inventors: Shinji Inoue, Takuji Maeda, Masayuki Toyama, Tomoaki Izumi, Masahiro Nakanishi, Shoichi Tsujita
  • Patent number: 6665757
    Abstract: A communication interface of the present invention includes a clock signal line, a first signal line, a second signal line and one or more data signal lines as communication signal lines between a master system and a slave system.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: December 16, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoichi Tsujita, Masaru Fujii, Tatsuhiro Hosokawa, Tsutomu Sekibe, Hiroshi Sakurai, Hideki Kawai