Patents by Inventor Shoichi Washizuka

Shoichi Washizuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7037738
    Abstract: There is disclosed a semiconductor light-emitting element comprising a substrate having a first surface and a second surface, a semiconductor laminate formed on the first surface of the substrate and containing a light-emitting layer and a current diffusion layer having a light-extracting surface. The light-emitting element is provided with a light-extracting surface which is constituted by a finely recessed/projected surface, 90% of which is constructed such that the height of the projected portion thereof having a cone-like configuration is 100 nm or more, and the width of the base of the projected portion is within the range of 10-500 nm.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: May 2, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hitoshi Sugiyama, Kenichi Ohashi, Atsuko Yamashita, Shoichi Washizuka, Yasuhiko Akaike, Shunji Yoshitake, Koji Asakawa, Katsumi Egashira, Akira Fujimoto
  • Patent number: 6924513
    Abstract: A light emitting element includes: a light emitting layer; a rectangular first principal surface being parallel to the light emitting layer; a rectangular second principal surface opposing to the first principal surface so that the light emitting layer is sandwiched between the first and second principal surfaces; and first through fourth side surfaces of the light emitting element provided with a rough surface, the first through fourth side surfaces connecting between the first principal surface and the second principal surface, respectively so as to define a solid shape.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: August 2, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Shoichi Washizuka, Yoshiyuki Kinugawa
  • Publication number: 20050145864
    Abstract: There is disclosed a semiconductor light-emitting element comprising a substrate having a first surface and a second surface, a semiconductor laminate formed on the first surface of the substrate and containing a light-emitting layer and a current diffusion layer having a light-extracting surface. The light-emitting element is provided with a light-extracting surface which is constituted by a finely recessed/projected surface, 90% of which is constructed such that the height of the projected portion thereof having a cone-like configuration is 100 nm or more, and the width of the base of the projected portion is within the range of 10-500 nm.
    Type: Application
    Filed: February 10, 2005
    Publication date: July 7, 2005
    Inventors: Hitoshi Sugiyama, Kenichi Ohashi, Atsuko Yamashita, Shoichi Washizuka, Yasuhiko Akaike, Shunji Yoshitake, Koji Asakawa, Katsumi Egashira, Akira Fujimoto
  • Publication number: 20040026700
    Abstract: A light emitting element includes: a light emitting layer; a rectangular first principal surface being parallel to the light emitting layer; a rectangular second principal surface opposing to the first principal surface so that the light emitting layer is sandwiched between the first and second principal surfaces; and first through fourth side surfaces of the light emitting element provided with a rough surface, the first through fourth side surfaces connecting between the first principal surface and the second principal surface, respectively so as to define a solid shape.
    Type: Application
    Filed: January 28, 2003
    Publication date: February 12, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasuhiko Akaike, Shoichi Washizuka, Yoshiyuki Kinugawa
  • Publication number: 20030178626
    Abstract: There is disclosed a semiconductor light-emitting element comprising a substrate having a first surface and a second surface, a semiconductor laminate formed on the first surface of the substrate and containing a light-emitting layer and a current diffusion layer having a light-extracting surface. The light-emitting element is provided with a light-extracting surface which is constituted by a finely recessed/projected surface, 90% of which is constructed such that the height of the projected portion thereof having a cone-like configuration is 100 nm or more, and the width of the base of the projected portion is within the range of 10-500 nm.
    Type: Application
    Filed: January 17, 2003
    Publication date: September 25, 2003
    Inventors: Hitoshi Sugiyama, Kenichi Ohashi, Atsuko Yamashita, Shoichi Washizuka, Yasuhiko Akaike, Shunji Yoshitake, Koji Asakawa, Katsumi Egashira, Akira Fujimoto
  • Patent number: 6373069
    Abstract: An evaluating method capable of quickly measuring the essential lifetime in an epitaxial wafer for a light emitting device independently from the excited carrier density without breaking the epitaxial wafer is configured to obtain the non-radiative lifetime from the changing rate of intensity of luminescence light generated by irradiating exited light onto the epitaxial wafer at the time when the changes with time becomes below a given value, and to obtain the non-radiative lifetime independent from the excited carrier density. An epitaxial wafer for a light emitting device with a higher emission efficiency than conventional ones has a non-radiative lifetime not shorter than 20 nanoseconds obtained by the evaluating method, and the diffusion amount of zinc into its active layer does not exceed 1E13 atoms per cm2.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasuhiko Akaike, Shoichi Washizuka
  • Patent number: 5179333
    Abstract: A semiconductor wafer evaluation apparatus, wherein a conductivity detector and a carrier mobility detector are independently arranged so that detections can be made under optimum conditions, respectively. A wafer carrying unit is arranged so as to carry or convey a semiconductor wafer on a carrying path between the two detectors. These components are controlled by a controller. A carrier concentration is calculated from the conductivity and the carrier mobility detected by both detectors. When a partition wall for preventing interference of an electromagnetic wave is provided between the conductivity detector and the carrier mobility detector, interference between the two detectors is further reduced.
    Type: Grant
    Filed: November 16, 1990
    Date of Patent: January 12, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shoichi Washizuka, Takao Ohta