Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.

Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.

Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.

Abstract: A semiconductor integrated circuit has an internal circuit to which operation power is supplied or interrupted, and a power supply control circuit for controlling the supply and interruption of operation power to the internal circuit in accordance with an operation mode. The power supply control circuit has a storage circuit and a power supply control sequence circuit. The storage circuit inputs and holds switching instruction data for instructing switching between supply and interruption of the operation power and low-power-consumption-mode data determining an operation mode of the interruption of operation power and cancellation of the interruption.

Abstract: The invention provides a data processor realizing high-speed reading of an on-chip nonvolatile memory and improvement in defect repairing efficiency. For a nonvolatile memory, nonvolatile memory cells each having a split-gate structure including a memory transistor part of an ONO structure and a selection transistor part for selecting the memory transistor part are employed. The gate withstand voltage of the selection transistor part can be lower than that of the memory transistor part, so that it is convenient to increase reading speed. A specific storage region which can be read by a resetting instruction of the data processor is assigned to a storage region in the nonvolatile memory, and repair information and the like is stored in the specific storage region. An internal circuit to which the repair information is transferred replaces a normal storage region instructed by the repair information with a redundant storage region.