Patents by Inventor Shoichiro Izumi

Shoichiro Izumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180248339
    Abstract: A surface-emitting laser according to one embodiment of the technology includes a laser element section that includes a first multi-layer film reflecting mirror, a first semiconductor layer of a first conductivity type, an active layer, a second semiconductor layer of a second conductivity type, a second multi-layer film reflecting mirror, a nitride semiconductor layer of the second conductivity type, and a light output surface in this order. The laser element section further includes an electrode that injects a current into the active layer.
    Type: Application
    Filed: August 18, 2016
    Publication date: August 30, 2018
    Inventors: Shoichiro IZUMI, Tatsushi HAMAGUCHI, Noriyuki FUTAGAWA, Masaru KURAMOTO
  • Publication number: 20180212402
    Abstract: A light emitting element includes at least a first light reflecting layer formed on a surface of a substrate, a laminated structural body made of a first compound semiconductor layer, an active layer and a second compound semiconductor layer formed on the first light reflecting layer, and a second electrode and a second light reflecting layer formed on the second compound semiconductor layer, the laminated structural body is configured from a plurality of laminated structural body units, a light emitting element unit is configured from each of the laminated structural body units, and a resonator length in the light emitting element unit is different in every light emitting element unit.
    Type: Application
    Filed: January 2, 2018
    Publication date: July 26, 2018
    Inventors: Tatsushi HAMAGUCHI, Noriyuki FUTAGAWA, Shoichiro IZUMI, Masaru KURAMOTO
  • Patent number: 9882352
    Abstract: A light emitting element includes at least a first light reflecting layer 41 formed on a surface of a substrate 11, a laminated structural body 20 made of a first compound semiconductor layer 21, an active layer 23 and a second compound semiconductor layer 22 formed on the first light reflecting layer 41, and a second electrode 32 and a second light reflecting layer 42 formed on the second compound semiconductor layer 22, the laminated structural body 20 is configured from a plurality of laminated structural body units 20A, a light emitting element unit 10A is configured from each of the laminated structural body units 20A, and a resonator length in the light emitting element unit 10A is different in every light emitting element unit.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: January 30, 2018
    Assignee: Sony Corporation
    Inventors: Tatsushi Hamaguchi, Noriyuki Futagawa, Shoichiro Izumi, Masaru Kuramoto
  • Publication number: 20170373468
    Abstract: A light emitting device, includes a selective growth mask layer 44; a first light reflection layer 41 thinner than the selective growth mask layer 44; a laminated structure including a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22, the first compound semiconductor layer 21 being formed on the first light reflection layer 41; and a second electrode 32 formed on the second compound semiconductor layer 22, and a second light reflection layer 42, in which the second light reflection layer 42 is opposed to the first light reflection layer 41, and the second light reflection layer is not formed on an upper side of the selective growth mask layer 44.
    Type: Application
    Filed: October 23, 2015
    Publication date: December 28, 2017
    Inventors: SHOICHIRO IZUMI, MASARU KURAMOTO, NORIYUKI FUTAGAWA, TATSUSHI HAMAGUCHI
  • Publication number: 20170346258
    Abstract: Provided is an optical semiconductor device including a laminate structural body 20 in which an n-type compound semiconductor layer 21, an active layer 23, and a p-type compound semiconductor layer 22 are laminated in this order. The active layer 23 includes a multiquantum well structure including a tunnel barrier layer 33, and a compositional variation of a well layer 312 adjacent to the p-type compound semiconductor layer 22 is greater than a compositional variation of another well layer 311. Band gap energy of the well layer 312 adjacent to the p-type compound semiconductor layer 22 is smaller than band gap energy of the other well layer 311. A thickness of the well layer 312 adjacent to the p-type compound semiconductor layer 22 is greater than a thickness of the other well layer 311.
    Type: Application
    Filed: October 2, 2015
    Publication date: November 30, 2017
    Inventors: MASARU KURAMOTO, NORIYUKI FUTAGAWA, TATSUSHI HAMAGUCHI, SHOICHIRO IZUMI
  • Publication number: 20170201073
    Abstract: A light-emitting element includes at least a GaN substrate 11; a first light reflecting layer 41 formed on the GaN substrate 11 and functioning as a selective growth mask layer 44; a first compound semiconductor layer 21, an active layer 23, and a second compound semiconductor layer 22 that are formed on the first light reflecting layer; and a second electrode 32 and a second light reflecting layer 42 that are formed on the second compound semiconductor layer 22. An off angle of the plane orientation of the surface of the GaN substrate 11 is 0.4 degrees or less, the area of the first light reflecting layer 41 is 0.8S0 or less, where S0 represents the area of the GaN substrate 11, and as a bottom layer 41A of the first light reflecting layer, a thermal expansion relaxation film 44 is formed on the GaN substrate 11.
    Type: Application
    Filed: April 16, 2015
    Publication date: July 13, 2017
    Inventors: NORIYUKI FUTAGAWA, TATSUSHI HAMAGUCHI, SHOICHIRO IZUMI, MASARU KURAMOTO
  • Publication number: 20170033533
    Abstract: A light emitting element includes at least a first light reflecting layer 41 formed on a surface of a substrate 11, a laminated structural body 20 made of a first compound semiconductor layer 21, an active layer 23 and a second compound semiconductor layer 22 formed on the first light reflecting layer 41, and a second electrode 32 and a second light reflecting layer 42 formed on the second compound semiconductor layer 22, the laminated structural body 20 is configured from a plurality of laminated structural body units 20A, a light emitting element unit 10A is configured from each of the laminated structural body units 20A, and a resonator length in the light emitting element unit 10A is different in every light emitting element unit.
    Type: Application
    Filed: April 17, 2015
    Publication date: February 2, 2017
    Inventors: Tatsushi HAMAGUCHI, Noriyuki FUTAGAWA, Shoichiro IZUMI, Masaru KURAMOTO
  • Patent number: 5387265
    Abstract: In the semiconductor manufacturing apparatus according to the present invention, there are provided a cassette stocker for accommodating wafer cassettes loaded with wafers, a reaction furnace provided with heating means, a reaction gas introducing means for introducing reaction gas into the reaction furnace, a gas discharging means for discharging exhaust gas in the reaction furnace, a boat for supporting wafers, a buffer cassette stocker for storing unprocessed wafers, a boat elevating means for inserting the boat into and retrieving the boat from the reaction furnace, a wafer transfer means for transferring wafers between the boat and the wafer cassette accommodated on the cassette stocker, and a wafer cassette transfer means for transferring wafer cassettes between the buffer cassette stocker and the cassette stocker, and the buffer cassette stocker is enclosed to provide an antioxidation area to prevent natural oxidation of the wafers in standby status.
    Type: Grant
    Filed: October 26, 1992
    Date of Patent: February 7, 1995
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Satoshi Kakizaki, Toshikazu Karino, Shoichiro Izumi, Mikio Koizumi, Makoto Ozawa, Fumihide Ikeda, Tohru Yoshida, Ryoji Saito
  • Patent number: 5217340
    Abstract: A wafer transfer method and mechanism in a vertical CVD diffusion apparatus and a control device for the method and mechanism. The vertical-type CVD diffusion apparatus has a boat containing many wafers in a horizontal orientation, stacked vertically. Product wafers are transferred to the boat five by five, dummy wafers are transferred five by five or a fraction less than five, and monitor wafers are inserted one by one between a block of the product wafers and another block of the product wafers, or a block of the dummy wafers.
    Type: Grant
    Filed: April 23, 1992
    Date of Patent: June 8, 1993
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Yasuhiro Harada, Toshikazu Karino, Ryoji Saito, Koji Tometsuka, Shoichiro Izumi
  • Patent number: 5112641
    Abstract: A wafer transfer method and mechanism in a vertical CVD diffusion apparatus and a control device for the method and mechanism. The vertical-type CVD diffusing apparatus has a boat containing many wafers in a horizontal orientation, stacked vertically. Product wafers are transferred to the boat five by five, dummy wafers are transferred five by five or a fraction less than five, and monitor wafers are inserted one by one between a block of the product wafers and another block of the product wafers, or a block of the dummy wafers.
    Type: Grant
    Filed: January 18, 1990
    Date of Patent: May 12, 1992
    Assignee: Kokusai Electric Co., Ltd.
    Inventors: Yasuhiro Harada, Toshikazu Karino, Ryoji Saito, Koji Tometsuka, Shoichiro Izumi