Patents by Inventor Shoichiro Suzuki

Shoichiro Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10121591
    Abstract: A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: November 6, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinichi Yamaguchi, Shoichiro Suzuki, Akitaka Doi
  • Patent number: 10079106
    Abstract: A multilayer ceramic capacitor that includes a ceramic laminated body having dielectric layers and internal electrodes at the interfaces between the dielectric layers, and external electrodes on the outer surface of the ceramic laminated body. The dielectric layers contain, as their main constituent, a perovskite-type compound including Ba, Ti, Zr, and M. M is at least one element of Ta, Nb, V, and W. The dielectric layers further contain Mn and Si as additive constituents. With respect to the total amount of Ti, Zr, and M, 40 mol %<Zr?90 mol %, M is 1 mol %?M?10 mol %. When the total amount of Ti, Zr, and M is regarded as 100 parts by mol, 1 part by mol?Mn?10 parts by mol, 1 part by mol?Si?5 parts by mol, and 0.5?Mn/M?3.0.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: September 18, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shoichiro Suzuki, Takafumi Okamoto
  • Publication number: 20180233291
    Abstract: A roll-up type capacitor that includes a plurality of cylindrical parts arranged parallel to one another and which each are a rolled-up laminate; a first external electrode on respective first ends of the plurality of cylindrical parts; and a second external electrode on respective second ends of the plurality of cylindrical parts. When, prior to being rolled-up, a dimension of the laminate parallel to a rolling-up direction is a length L, and a dimension of the laminate perpendicular to laminating direction and the rolling-up direction is a width W, the roll-up type capacitor has two or more cylindrical parts when a ratio L/W is 4 or more; has three or more cylindrical parts when L/W is 3 to less than 4; has four or more cylindrical parts when L/W is 2 to less than 3; and has eight or more cylindrical parts when L/W is 1 to less than 2.
    Type: Application
    Filed: April 10, 2018
    Publication date: August 16, 2018
    Inventor: SHOICHIRO SUZUKI
  • Patent number: 10014463
    Abstract: A multilayer sintered body having alternately stacked Ni-based inner electrodes and piezoelectric ceramic layers. The piezoelectric ceramic layers contain a main ingredient of a perovskite compound containing Nb, K, Na, and Li, at least one element M1 selected from Nd and Dy, and at least one element M2 selected from Ga and Al. The element M2 content is 0.071 parts by mole or less per 1 part by mole of the Nb in a solution obtained through a dissolution process. This multilayer piezoelectric ceramic electronic component is manufactured through the cofiring of conductive films as a precursor of the inner electrodes and ceramic green sheets as a precursor of the piezoelectric ceramic layers in a reducing atmosphere in which the oxidation of Ni is inhibited.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: July 3, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideki Ishii, Shinichiro Kawada, Hiroyuki Hayashi, Tadashi Okuzawa, Shoichiro Suzuki
  • Publication number: 20170348465
    Abstract: A polymer film can be adjusted to movement or a fine uneven surface of a living body and has excellent ability to adhere to a biological tissue. The polymer film includes a block copolymer having a structure in which branched polyalkylene glycol and polyhydroxyalkanoic acid are bound to each other, wherein the polymer film has a film thickness of 10 to 1000 nm. The branched polyalkylene glycol has at least three terminal hydroxyl groups per molecule, the mass percentage of the branched polyalkylene glycol relative to the total mass of the block copolymer is 1% to 30%, and a value obtained by dividing the average molecular weight of polyhydroxyalkanoic acid in the block copolymer by X that is the number of terminal hydroxyl groups present per a single molecule of the branched polyalkylene glycol is 10000 to 30000.
    Type: Application
    Filed: June 17, 2016
    Publication date: December 7, 2017
    Applicants: Toray Industries, Inc., Nanotheta Co., Ltd.
    Inventors: Akihiro Saito, Toru Arakane, Kazuhiro Tanahashi, Koji Okabayashi, Shinji Takeoka, Toshinori Fujie, Shoichiro Suzuki, Atsushi Murata, Shinya Otsubo
  • Patent number: 9818536
    Abstract: A multilayer ceramic capacitor that includes an internal electrode containing at least one kind of metal A selected from the group consisting of In, Ga, Zn, Bi, and Pb and dissolved in Ni to form a solid solution. The internal electrode has a ratio of A of 1.4 atomic percent or more to a total amount of A and Ni in a near-interface region located to a depth of 2 nm from a surface of the internal electrode facing a corresponding ceramic dielectric layer. A relation between a value X of atomic percent representing the ratio of A in the near-interface region and a value Y of atomic percent representing the ratio of A in a central region in a thickness direction of the internal electrode is X?Y?1.0. Such a multilayer capacitor is formed by annealing a ceramic stack under a predetermined condition to increase the ratio of metal A in the near-interface region of the internal electrode.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: November 14, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shoichiro Suzuki, Shinichi Yamaguchi, Akitaka Doi
  • Publication number: 20170309400
    Abstract: A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.
    Type: Application
    Filed: July 7, 2017
    Publication date: October 26, 2017
    Inventors: SHINICHI YAMAGUCHI, Shoichiro Suzuki, Akitaka Doi
  • Patent number: 9728333
    Abstract: A laminated ceramic capacitor that includes a ceramic laminated body having a stacked plurality of ceramic dielectric layers and a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween, and external electrodes on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni and Sn, a proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is 75% or more in a region of the internal electrode at a depth of 20 nm from a surface opposed to the ceramic dielectric layer, and the proportion of the Sn/(Ni+Sn) ratio is 0.001 or more in molar ratio is less than 40% in a central region in a thickness direction of the internal electrode.
    Type: Grant
    Filed: February 5, 2015
    Date of Patent: August 8, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shinichi Yamaguchi, Shoichiro Suzuki, Akitaka Doi
  • Publication number: 20170162333
    Abstract: A roll-up type capacitor includes a cylindrical part, a first external electrode, and a second external electrode. The cylindrical part is a rolled-up laminate in which a lower electrode layer, a dielectric layer and an upper electrode layer are laminated in this order. The first external electrode is electrically connected to the upper electrode layer, and the second external electrode is electrically connected to the lower electrode layer, and the first external electrode and the second external electrode are respectively located on opposed sides of the cylindrical part such that they face to each other.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 8, 2017
    Inventors: SHOICHIRO SUZUKI, Akira Ando, Koichi Banno, Oliver G. Schmidt, Daniel Grimm
  • Publication number: 20170162332
    Abstract: A roll-up type capacitor that includes a diffusion-preventing layer, a lower electrode layer, a dielectric layer and an upper electrode layer laminated in this order and rolled-up so that the upper electrode layer is present on an inner side, and the diffusion-preventing layer is formed by an atomic layer deposition method.
    Type: Application
    Filed: February 23, 2017
    Publication date: June 8, 2017
    Inventors: Shoichiro Suzuki, lvoyl P. Koutsaroff, Koichi Banno, Oliver G. Schmidt, Daniel Grimm
  • Publication number: 20170133155
    Abstract: A multilayer ceramic capacitor that includes a ceramic laminated body having dielectric layers and internal electrodes at the interfaces between the dielectric layers, and external electrodes on the outer surface of the ceramic laminated body. The dielectric layers contain, as their main constituent, a perovskite-type compound including Ba, Ti, Zr, and M. M is at least one element of Ta, Nb, V, and W. The dielectric layers further contain Mn and Si as additive constituents. With respect to the total amount of Ti, Zr, and M, 40 mol %<Zr?90 mol %, M is 1 mol %?M?10 mol %. When the total amount of Ti, Zr, and M is regarded as 100 parts by mol, 1 part by mol?Mn?10 parts by mol, 1 part by mol?Si?5 parts by mol, and 0.5?Mn/M?3.0.
    Type: Application
    Filed: January 19, 2017
    Publication date: May 11, 2017
    Inventors: SHOICHIRO SUZUKI, Takafumi Okamoto
  • Patent number: 9627135
    Abstract: A ceramic capacitor having dielectric ceramic layers that include Ba, Re (Re is at least one of La, Ce, Pr, Nd, and Sm), Ti, Zr, M (M is at least one of Mg, Al, Mn, and V), Si, and optionally Sr, where at least some of the Ba, Re, Ti, and Zr and optionally Sr are in the form of a perovskite compound. Respective amounts, expressed as parts by mol, of the elements of the dielectric ceramic layers satisfy, with respect to a total of 100 of the Ti amount and the Zr amount, 0?a?20.0 where a is the Sr amount; 0.5?b?10.0 where b is the Re amount; 46?c?90 where c is the Zr amount; 0.5?d?10.0 where d is the M amount; 0.5?e?5.0 where e is the Si amount; and 0.990?m?1.050 where m is a ratio of a total of the Ba amount, the Sr amount, and the Re amount, to the total of the Ti amount and the Zr amount.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: April 18, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takafumi Okamoto, Shoichiro Suzuki
  • Patent number: 9564271
    Abstract: A stacked ceramic capacitor that includes a ceramic body formed by stacking dielectric ceramic layers and internal electrodes mainly composed of Ni; and an external electrode formed on an outer surface of ceramic body. The dielectric ceramic layers are formed by using a dielectric ceramic composition that includes a main ingredient expressed by (KaNabLicM2d)(NbwTaxMgyM4z)O3, where M2 is at least one of Ca, Sr and Ba, M4 is at least one of Zr, Hf and Sn, and a, b, c, d, w, x, y, and z satisfy predetermined relationships; and includes 2 to 15 molar parts of Mn with respect to 100 molar parts of a total content of Nb, Ta, Mg, and M4.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: February 7, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Koichi Banno, Shoichiro Suzuki, Masaru Miyayama, Yuji Noguchi
  • Patent number: 9558886
    Abstract: A laminate body includes a plurality of ceramic layers and capacitor conductors embedded in the laminate body so as to be opposed to each other via one of the ceramic layers. The capacitor conductors are made of an Al-based material, and the capacitor conductors include narrow portions, respectively, which function as fuse elements. The narrow portions have an average width smaller than an average width of portions of the capacitor conductors other than the narrow portions. As a result, the electronic component has an improved capability to protect its function as a capacitor when a short circuit occurs between capacitor conductors.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: January 31, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Koichi Banno, Shoichiro Suzuki, Taisuke Kanzaki, Akihiro Shiota
  • Patent number: 9522847
    Abstract: There are provided a dielectric ceramic having large specific resistance and even capacitance characteristic at 150° C., as well as a laminated ceramic electronic component employing such a dielectric ceramic. A ceramic layer includes crystal grains, the ceramic layer containing a perovskite type compound containing Ba, Ca, Ti, and Zr, containing Si, and optionally containing Mn. When the total content of Ti and Zr is 1 molar part, the content of Mn is 0.015 molar part or less, the content of Si is 0.005 molar part or more and less than 0.03 molar part, the molar ratio x of Ca/(Ba+Ca) satisfies 0.05<x<0.20, and the molar ratio y of Zr/(Ti+Zr) satisfies 0.03<y<0.18. The crystal grains have an average grain size of less than 130 nm.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 20, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shoichiro Suzuki, Shinichi Yamaguchi
  • Patent number: 9520231
    Abstract: A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: December 13, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shoichiro Suzuki, Shinichi Yamaguchi
  • Publication number: 20160358712
    Abstract: A multilayer ceramic capacitor having inner electrodes with a Ni-Metal A alloy, the Metal A being selected from Fe, V, Y, and Cu and dissolved in the Ni to form a solid solution. The percentage of the Metal A with respect to the total amount of Metal A and Ni in near-surface regions located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and XA?YA?1.0, where XA represents the atomic percentage of Metal A in the near-surface regions and YA represents the atomic percentage of Metal A in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body under specific conditions to thereby increase, in the inner electrodes, the percentage of Metal A in the near-surface regions.
    Type: Application
    Filed: May 25, 2016
    Publication date: December 8, 2016
    Inventors: Akitaka Doi, Shinichi Yamaguchi, Shoichiro Suzuki
  • Publication number: 20160358713
    Abstract: A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X?Y?1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.
    Type: Application
    Filed: May 25, 2016
    Publication date: December 8, 2016
    Inventors: AKITAKA DOI, Shinichi Yamaguchi, Shoichiro Suzuki
  • Patent number: 9466423
    Abstract: A laminated ceramic capacitor that includes a ceramic laminated body of a plurality of stacked ceramic dielectric layers, a plurality of internal electrodes opposed to each other with the ceramic dielectric layers interposed therebetween within the ceramic laminated body, and external electrodes provided on the outer surface of the ceramic laminated body and electrically connected to the internal electrodes. The internal electrodes contain Ni as a main constituent, and the Ni constituting the internal electrodes has a lattice constant in the range of 0.3250 nm to 0.3450 nm.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: October 11, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shoichiro Suzuki, Shinichi Yamaguchi
  • Publication number: 20160276102
    Abstract: A multilayer ceramic capacitor that includes an internal electrode containing at least one kind of metal A selected from the group consisting of In, Ga, Zn, Bi, and Pb and dissolved in Ni to form a solid solution. The internal electrode has a ratio of A of 1.4 atomic percent or more to a total amount of A and Ni in a near-interface region located to a depth of 2 nm from a surface of the internal electrode facing a corresponding ceramic dielectric layer. A relation between a value X of atomic percent representing the ratio of A in the near-interface region and a value Y of atomic percent representing the ratio of A in a central region in a thickness direction of the internal electrode is X?Y?1.0. Such a multilayer capacitor is formed by annealing a ceramic stack under a predetermined condition to increase the ratio of metal A in the near-interface region of the internal electrode.
    Type: Application
    Filed: June 2, 2016
    Publication date: September 22, 2016
    Inventors: Shoichiro Suzuki, Shinichi Yamaguchi, Akitaka Doi