Patents by Inventor Shoji Asaka

Shoji Asaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7435302
    Abstract: A cleaning apparatus according to the present invention is provided with a brush drive mechanism which brings a brush being rotating closer to a substrate, measures electrical potentials generated on a plurality of conductor patterns formed on the substrate, by a contact and separation with/from tips of scrub materials of the brush being rotating, and controls a positioning of the brush by use of the measurement results. With the process as described above, it is possible to treat uniformly a surface to-be-cleaned for a large-sized substrate, with the cleaning brush. Consequently, it is possible to form a highly qualified transistor for liquid crystal display on the substrate having been cleaned, with enhancing yield.
    Type: Grant
    Filed: August 10, 2004
    Date of Patent: October 14, 2008
    Assignee: Hitachi Displays, Ltd.
    Inventors: Yoichi Takahara, Masahiro Yamada, Noriyuki Ohroku, Shoji Asaka, Tomoaki Takahashi, Hiroshi Kawanago, Hideaki Yamamoto
  • Patent number: 7084063
    Abstract: The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: August 1, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Junji Noguchi, Shoji Asaka, Nobuhiro Konishi, Naohumi Ohashi, Hiroyuki Maruyama
  • Publication number: 20050067104
    Abstract: A cleaning apparatus according to the present invention is provided with a brush drive mechanism which brings a brush being rotating closer to a substrate, measures electrical potentials generated on a plurality of conductor patterns formed on the substrate, by a contact and separation with/from tips of scrub materials of the brush being rotating, and controls a positioning of the brush by use of the measurement results. With the process as described above, it is possible to treat uniformly a surface to-be-cleaned for a large-sized substrate, with the cleaning brush. Consequently, it is possible to form a highly qualified transistor for liquid crystal display on the substrate having been cleaned, with enhancing yield.
    Type: Application
    Filed: August 10, 2004
    Publication date: March 31, 2005
    Inventors: Yoichi Takahara, Masahiro Yamada, Noriyuki Ohroku, Shoji Asaka, Tomoaki Takahashi, Hiroshi Kawanago, Hideaki Yamamoto
  • Publication number: 20040147127
    Abstract: The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.
    Type: Application
    Filed: December 23, 2003
    Publication date: July 29, 2004
    Inventors: Junji Noguchi, Shoji Asaka, Nobuhiro Konishi, Naohumi Ohashi, Hiroyuki Maruyama
  • Patent number: 6723631
    Abstract: The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, a deoxidizing process due to hydrogen annealing or the like, and acid cleaning are carried out in this order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this way, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: April 20, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Junji Noguchi, Shoji Asaka, Nobuhiro Konishi, Naohumi Ohashi, Hiroyuki Maruyama
  • Publication number: 20020042193
    Abstract: The copper interconnect formed by the use of a damascene technique is improved in dielectric breakdown strength (reliability). During post-CMP cleaning, alkali cleaning, deoxidizing process due to hydrogen anneal or the like and acid cleaning are carried out in the order. After the post-CMP cleaning and before forming an insulation film for a cap film, hydrogen plasma and ammonia plasma processes are carried out on the semiconductor substrate. In this manner, a copper-based buried interconnect is formed in an interlayer insulation film structured of an insulation material having a low dielectric constant.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 11, 2002
    Inventors: Junji Noguchi, Shoji Asaka, Nobuhiro Konishi, Naohumi Ohashi, Hiroyuki Maruyama