Patents by Inventor Shoji Higashida

Shoji Higashida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9640612
    Abstract: A semiconductor device includes: a first conductivity type semiconductor substrate; and a plurality of second conductivity type semiconductor regions, the respective second conductivity type semiconductor regions being embedded in a plurality of stripe shaped trenches formed in the semiconductor substrate so that the respective second conductivity type semiconductor regions are extended in the row direction or the column direction in parallel with a first principal surface of the semiconductor substrate and are spaced in a fixed gap mutually. The semiconductor substrate and the plurality of the semiconductor regions are depleted by a depletion layer extended in the direction in parallel to the first principal surface from a plurality of pn junction interfaces, and the respective pn junction interfaces are formed between the semiconductor substrate and the plurality of the semiconductor regions.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: May 2, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Shoji Higashida
  • Publication number: 20160141356
    Abstract: A semiconductor device includes: a first conductivity type semiconductor substrate; and a plurality of second conductivity type semiconductor regions, the respective second conductivity type semiconductor regions being embedded in a plurality of stripe shaped trenches formed in the semiconductor substrate so that the respective second conductivity type semiconductor regions are extended in the row direction or the column direction in parallel with a first principal surface of the semiconductor substrate and are spaced in a fixed gap mutually. The semiconductor substrate and the plurality of the semiconductor regions are depleted by a depletion layer extended in the direction in parallel to the first principal surface from a plurality of pn junction interfaces, and the respective pn junction interfaces are formed between the semiconductor substrate and the plurality of the semiconductor regions.
    Type: Application
    Filed: January 4, 2016
    Publication date: May 19, 2016
    Applicant: ROHM CO., LTD.
    Inventor: Shoji Higashida
  • Patent number: 9231099
    Abstract: A semiconductor device includes: a first conductivity type semiconductor substrate; and a plurality of second conductivity type semiconductor regions, the respective second conductivity type semiconductor regions being embedded in a plurality of stripe shaped trenches formed in the semiconductor substrate so that the respective second conductivity type semiconductor regions are extended in the row direction or the column direction in parallel with a first principal surface of the semiconductor substrate and are spaced in a fixed gap mutually. The semiconductor substrate and the plurality of the semiconductor regions are depleted by a depletion layer extended in the direction in parallel to the first principal surface from a plurality of pn junction interfaces, and the respective pn junction interfaces are formed between the semiconductor substrate and the plurality of the semiconductor regions.
    Type: Grant
    Filed: November 27, 2009
    Date of Patent: January 5, 2016
    Assignee: ROHM CO., LTD.
    Inventor: Shoji Higashida
  • Publication number: 20110248335
    Abstract: A semiconductor device includes: a first conductivity type semiconductor substrate; and a plurality of second conductivity type semiconductor regions, the respective second conductivity type semiconductor regions being embedded in a plurality of stripe shaped trenches formed in the semiconductor substrate so that the respective second conductivity type semiconductor regions are extended in the row direction or the column direction in parallel with a first principal surface of the semiconductor substrate and are spaced in a fixed gap mutually. The semiconductor substrate and the plurality of the semiconductor regions are depleted by a depletion layer extended in the direction in parallel to the first principal surface from a plurality of pn junction interfaces, and the respective pn junction interfaces are formed between the semiconductor substrate and the plurality of the semiconductor regions.
    Type: Application
    Filed: November 27, 2009
    Publication date: October 13, 2011
    Applicant: ROHM CO., LTD.
    Inventor: Shoji Higashida