Patents by Inventor Shoji Isawa

Shoji Isawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6737910
    Abstract: A semiconductor integrated circuit includes a first power supply line which supplies an external power supply voltage provided from an exterior of the circuit, a second power supply line which supply an internal power supply voltage to an interior circuit, a plurality of NMOS transistors which are situated at different locations, and have drain nodes thereof coupled to the first power supply line and source nodes thereof coupled to the second power supply line, and a regulator circuit which supplies a reference voltage to gate nodes of the plurality of NMOS transistors.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: May 18, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasuhiro Kitagawa, Hiroshi Fujii, Shoji Isawa, Yukihiro Yaguchi
  • Publication number: 20030231052
    Abstract: A semiconductor integrated circuit includes a first power supply line which supplies an external power supply voltage provided from an exterior of the circuit, a second power supply line which supply an internal power supply voltage to an interior circuit, a plurality of NMOS transistors which are situated at different locations, and have drain nodes thereof coupled to the first power supply line and source nodes thereof coupled to the second power supply line, and a regulator circuit which supplies a reference voltage to gate nodes of the plurality of NMOS transistors.
    Type: Application
    Filed: June 5, 2003
    Publication date: December 18, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Yasuhiro Kitagawa, Hiroshi Fujii, Shoji Isawa, Yukihiro Yaguchi