Abstract: A memory circuit provided with an improved stand-by control circuit which is not affected by noise on a power supply voltage is disclosed. The memory circuit comprises a memory cell array, a peripheral circuit for performing an access operation to the memory cell array in an active state and holding data stored in the memory cell array in a stand-by state, a chip select input circuit receiving a chip select signal, a power voltage detection circuit for judging whether the power supply voltage is at a first value to be used in the active state or a second value lower than the first value to be used in the stand-by state, and a control circuit for enabling the chip select input circuit when the chip select signal is at its active level and the power supply voltage is at the first level and continuing to enable the chip select input circuit if the power supply voltage is changed to the second value under the active level of the chip select signal.