Patents by Inventor Shoji Matsumoto

Shoji Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210045228
    Abstract: A printed circuit board includes an electrical component including a signal terminal, and a printed wiring board on which the electrical component is mounted. The printed wiring board includes a signal line connected to the signal terminal. The signal line includes a first line portion, a second line portion, a third line portion, and a fourth line portion disposed continuously in this order. The signal terminal is joined with the fourth line portion such that the signal terminal and the fourth line portion form an integral structure. A second characteristic impedance of the second line portion is lower than a first characteristic impedance of the first line portion. A third characteristic impedance of the third line portion is higher than the first characteristic impedance. A fourth characteristic impedance of the integral structure formed by the fourth line portion and the signal terminal is lower than the first characteristic impedance.
    Type: Application
    Filed: July 14, 2020
    Publication date: February 11, 2021
    Inventor: Shoji Matsumoto
  • Publication number: 20210032756
    Abstract: A shaft member of an embodiment includes: a base material having a shaft shape and made of steel; a low phosphorus plating layer that is laminated on the base material, that includes phosphorus, and in which the phosphorus content is 4.5 mass % or less; and a base plating layer that is formed as an electrolytic nickel phosphorus plating layer or a high phosphorus plating layer laminated between the base material and the low phosphorus plating layer. It is thus possible to increase the strength of the shaft member and decrease the size of the shaft member.
    Type: Application
    Filed: December 27, 2018
    Publication date: February 4, 2021
    Applicants: AISIN AW CO., LTD., C. Uyemura & Co., Ltd.
    Inventors: Akihiko KITA, Seiya OZAWA, Takahiro MORI, Shoji IGUCHI, Osamu MATSUMOTO
  • Patent number: 10894320
    Abstract: A robot system includes a robot, a control circuit, a first wireless circuit, a second wireless circuit, and a teaching circuit. The first wireless circuit is connected to the control circuit. The teaching circuit is connected to the second wireless circuit to control the robot via the second wireless circuit, the first wireless circuit and the control circuit. The second wireless circuit is configured to transmit a control signal to the first wireless circuit with a first wireless communication scheme using frequency hopping, the robot being configured to be driven or not to be driven according to the control signal, and transmit an information signal to the first wireless circuit with a second wireless communication scheme in which a signal is transmitted in a case where a wireless resource is determined to be available, the information signal relating to driving of the robot.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: January 19, 2021
    Assignee: KABUSHIKI KAISHA YASKAWA DENKI
    Inventors: Shoji Kurihara, Ken Nakamura, Kazutoshi Kobayashi, Osamu Matsumoto, Yumie Kubota
  • Patent number: 10716211
    Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: July 14, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
  • Patent number: 10679766
    Abstract: A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: June 9, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takuya Kondo, Shoji Matsumoto, Seiji Hayashi
  • Patent number: 10648742
    Abstract: A finless heat exchanger includes a pair of headers each including a pipe-shaped portion extending in a first direction, and branching portions formed on the pipe-shaped portion, and flat pipes each having a flat sectional shape elongated in one direction, the flat pipes being arrayed in the first direction and connecting the branching portions of the headers. Flat surfaces of adjacent two flat pipes face each other and the adjacent two flat pipes each have a side surface facing a second direction orthogonal to the first direction. The flat pipes connect the branching portions, the side surface of each of the flat pipes has a wave shape, and adjacent flat pipes are prevented from contacting each other. Both the side surfaces are opened so that air flows in from a side corresponding to one side surface in the second direction and flows out from a side in the second direction.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: May 12, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Susumu Yoshimura, Takashi Matsumoto, Shigeyoshi Matsui, Shoji Yamada, Akira Ishibashi
  • Publication number: 20200098816
    Abstract: A transmission circuit includes a first semiconductor device, a second semiconductor device, a first signal line, a second signal line, a third signal line, and a ground line. A differential signal is composed of a first signal and a second signal. The first signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the first signal. The second signal line is configured to connect the first semiconductor device and the second semiconductor device and used to transmit the second signal. The second signal line, the first signal line, the ground line, and the third signal line are disposed in this order. A distance between the first signal line and the ground line is larger than a distance between the first signal line and the second signal line.
    Type: Application
    Filed: September 3, 2019
    Publication date: March 26, 2020
    Inventor: Shoji Matsumoto
  • Patent number: 10534075
    Abstract: The invention provides a three-dimensional surveying instrument, which comprises a light emitter for emitting a distance measuring light, a light projecting optical unit for irradiating a distance measuring light from the light emitter along a distance measuring optical axis, a light receiving optical unit for receiving a reflection light from an object to be measured, a photodetection element for converting the reflection light as focused at the light receiving optical unit to an electric signal, a scanning unit for scanning a distance measuring light with respect to the object to be measured provided on a frame unit, angle detecting units for detecting an irradiating direction of the distance measuring light as scanned by the scanning unit, a vibration detecting unit for detecting vibration amount of the frame unit, and a control arithmetic unit having a storage unit where a threshold value is stored, wherein the control arithmetic unit controls so that the number of rotations of the scanning unit is gradua
    Type: Grant
    Filed: April 13, 2016
    Date of Patent: January 14, 2020
    Assignee: TOPCON Corporation
    Inventors: Hideyuki Matsumoto, Yasushi Tanaka, Shoji Hayashi, Takaaki Saito
  • Publication number: 20190305151
    Abstract: A solar cell includes a semiconductor substrate that includes: a first principal surface and a second principal surface; a first collecting electrode disposed above the first principal surface of the semiconductor substrate; a metal layer disposed below the second principal surface of the semiconductor substrate; and a second collecting electrode disposed below the metal layer. The first collecting electrode includes one or more first finger electrodes, and the second collecting electrode includes one or more second finger electrodes. The one or more first finger electrodes and the one or more second finger electrodes are substantially parallel to each other in a plan view.
    Type: Application
    Filed: March 28, 2019
    Publication date: October 3, 2019
    Inventors: Shoji SATO, Toshiyuki SAKUMA, Mitsuhiro MATSUMOTO
  • Publication number: 20190246498
    Abstract: A printed wiring board includes a plurality of first wirings and a plurality of second wirings. The plurality of first wirings each include a first via conductor disposed outside a first region, a second region, and a third region in a plan view, and a first conductor pattern extending from the first via conductor to the first region. The plurality of second wirings each include a second via conductor disposed outside the first region, the second region, and the third region, and a second conductor pattern extending from the second via conductor to the first region. A fourth region overlaps with a fifth region in the plan view, the fourth region being a region in which a plurality of first conductor patterns are disposed, the fifth region being a region in which a plurality of second conductor patterns are disposed.
    Type: Application
    Filed: January 31, 2019
    Publication date: August 8, 2019
    Inventors: Takashi Numagi, Shoji Matsumoto, Hiroyuki Yamaguchi, Youhei Tazawa
  • Publication number: 20190224260
    Abstract: [Problem] To provide a metabolic syndrome inhibitor which can inhibit the accumulation of visceral fat and body fat to thereby ameliorate or prevent metabolic syndrome. [Solution] The metabolic syndrome inhibitor according to the present invention comprises soybean hypocotyl oil as an active ingredient. In particular, the metabolic syndrome inhibitor serves as a body fat accumulation inhibitor and/or a blood neutral fat increase inhibitor. In particular, the body fat accumulation inhibitor serves as a visceral fat accumulation inhibitor.
    Type: Application
    Filed: June 26, 2017
    Publication date: July 25, 2019
    Inventors: Shoji MATSUMOTO, Saki NISHIMURA, Masayoshi SAKAINO, Takatoshi YAMASHITA
  • Patent number: 10302765
    Abstract: An area monitoring system is configured to include a monitoring apparatus and a reflector. The monitoring apparatus includes a time-based detecting unit (i.e., a first detecting unit) that detects an intruder at a scanning angle by measuring a distance to an object based on an elapsed time until reflected light is received, for a first detection area. The monitoring apparatus further includes a light reception amount-based detecting unit (i.e., a second detecting unit) that detects an intruder at a scanning angle by comparing an actual light reception amount at a timing at which reflected light is received when radiated laser light is reflected by a reflector, and a light reception threshold (i.e., a reference light reception amount) set in advance, with a second detection area set farther than the first detection area as an area subjected to detection.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: May 28, 2019
    Assignees: DENSO WAVE INCORPORATED, DENSO CORPORATION
    Inventors: Shoji Katsura, Tetsuya Iwasaki, Keiji Matsumoto
  • Patent number: 10306761
    Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 28, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
  • Patent number: 10297430
    Abstract: Method of producing a target having a small average crystal grain size of gold or platinum and having a uniform crystal grain size in an in-plane direction of a target surface and a thickness direction of the target in order to further stabilize film deposition characteristics during sputtering.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: May 21, 2019
    Assignee: FURUYA METAL CO., LTD.
    Inventors: Tomohiro Maruko, Yu Suzuki, Shoji Saito, Amiko Ito, Yusuke Takaishi, Nobuo Kikuchi, Daishi Kaneko, Eiji Matsumoto
  • Publication number: 20180211743
    Abstract: A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.
    Type: Application
    Filed: March 19, 2018
    Publication date: July 26, 2018
    Inventors: Takuya Kondo, Shoji Matsumoto, Seiji Hayashi
  • Publication number: 20180168039
    Abstract: Provided is a printed wiring board including: a plurality of inner layers including a ground layer and a power supply layer; and a plurality of ground vias and a plurality of power supply vias each provided to penetrate at least the ground layer and the power supply layer in a thickness direction of the printed wiring board, a ground potential being applied to the plurality of ground vias at the ground layer, and a power supply potential being applied to the plurality of power supply vias at the power supply layer. In a top view from a direction perpendicular to the printed wiring board, a distance between vias to which the same potential is applied is shorter than a distance between vias to which different potentials are applied.
    Type: Application
    Filed: November 29, 2017
    Publication date: June 14, 2018
    Inventors: Takashi Numagi, Youhei Tazawa, Shoji Matsumoto
  • Patent number: 9953743
    Abstract: A printed circuit board has a printed wiring board and a semiconductor package mounted on the printed wiring board. The printed wiring board and the semiconductor package are connected with a plurality of solder balls. An underfill material covering the plurality of solder balls is filled between the printed wiring board and the semiconductor package. The underfill material has a relative dielectric constant of 8.6 or more and 54.4 or less. Thus, crosstalk noise generated in wiring in the out-of-plane direction is reduced without increasing the mounting area.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: April 24, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takuya Kondo, Shoji Matsumoto, Seiji Hayashi
  • Patent number: 9894751
    Abstract: First and second semiconductor devices and first and second bypass circuits are mounted on a printed wiring board. The first bypass circuit and the second bypass circuit are provided closer to the first semiconductor device and to the second semiconductor device, respectively. The first bypass circuit has one end connected to a power plane through a first power supply via and the other end connected to a ground plane through a first ground via. The second bypass circuit has one end connected to the power plane through a second power supply via and the other end connected to the ground plane through a second ground via. The ground plane has a slit between the connecting portions of the first and second ground vias to increase the impedance between the connecting portions of the first and the second ground vias. Thus, jitters caused by power supply noise can be reduced.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: February 13, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yusuke Murai, Shoji Matsumoto, Takashi Numagi, Hiroyuki Yamaguchi, Nobuaki Yamashita
  • Publication number: 20170368015
    Abstract: An object of the invention is to provide a compound that can be utilized as an antiviral agent, in particular as an anti-RNA viral agent, and especially as an anti-RS viral agent. The invention provides a compound indicated by Formula (1), wherein R1 each independently represent hydrogen, halogen, hydroxyl, amino, carboxyl, C1-C6 alkyl, C1-C6 alkoxyl, C1-C6 halogenoalkyl, C1-C6 alkoxycarbonyl, C1-C6 alkylamino, C2-C5 alkenyl, C3-C6 cycloalkyl, or optionally substituted aryl; R2 each independently represent hydrogen, C1-C6 alkyl, C1-C6 halogenoalkyl, C2-C5 alkenyl, C3-C6 cycloalkyl, optionally substituted aryl or heterocyclic group; and one or more R1 may be present in the same ring, an isomer thereof, a pharmaceutically acceptable salt thereof, or a mixture of these. The compounds provided by the invention are useful as drugs for the prevention or treatment of infectious diseases by virus, especially RS virus, and in particular infectious diseases in the lower airways (e.g., bronchiolitis, pneumonia, etc.).
    Type: Application
    Filed: December 25, 2015
    Publication date: December 28, 2017
    Applicant: NATIONAL UNIVERSITY CORPORATION CHIBA UNIVERSITY
    Inventors: Hiroshi SHIRASAWA, Takayoshi ARAI, Yutaka TAMURA, Kengo SAITO, Akiko SUGANAMI, Yoshifumi OHNO, Akira YANAGISAWA, Shoji MATSUMOTO, Tetsuhiro NEMOTO, Ouji WATANABE
  • Patent number: 9560758
    Abstract: A printed wiring board includes a first conductive layer, a second conductive layer arranged at a gap with respective to the first conductive layer, a third conductive layer, a first via conductor and a second via conductor, and a third signal wiring pattern. A first signal wiring pattern is arranged on the first conductive layer, a second signal wiring pattern is arranged on the second conductive layer, and a third signal wiring pattern that is arranged on the third conductive layer. The third conductive layer is arranged between the first conductive layer and the second conductive layer via an insulating layer. The first via conductor and the second via conductor, which are arranged to be mutually adjacent, connect the first signal wiring pattern to the second signal wiring pattern. The third signal wiring pattern connects the first via conductor to the second via conductor.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: January 31, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shoji Matsumoto, Seiji Hayashi, Takuya Kondo