Patents by Inventor Shoji Takaoka

Shoji Takaoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080283872
    Abstract: Provided are a first wiring layer where each of the first, second internally present wirings can be selectively connected to the first and the second externally extended wirings, and a second wiring layer that has substantially the same structure as that of the first wiring layer. There is further provided an interlayer contact layer which arbitrarily connects one of the first and the second internally present wirings on the first wiring layer to one of the first, second internally present wirings on the second wiring layer, and connects the remainder of the first and the second internally present wirings on the first wiring layer to the remainder of the first and the second internally present wirings on the second wiring layer.
    Type: Application
    Filed: September 14, 2007
    Publication date: November 20, 2008
    Inventors: Junji Kubo, Atsushi Yamamoto, Shoji Takaoka
  • Publication number: 20080250379
    Abstract: In a logic circuit synthesis device, a library of cell preliminarily stores a condition concerning a property that should be satisfied by the net having the property. The logic circuit synthesis device selects, from a list of nets, a net that has a predetermined property. the logic circuit synthesis device performs logic synthesis in accordance with the condition stored in the library, for the selected net.
    Type: Application
    Filed: November 29, 2007
    Publication date: October 9, 2008
    Inventors: Shoji TAKAOKA, Atsushi Yamamoto, Tomohiro Tsuda, Takashi Hiramatsu
  • Patent number: 5687922
    Abstract: A pulverizer used to pulverize tea leaves, grain such as sesame and wheat, and minerals such as ceramics and rocks. A pair of upper and lower mortars provided for the pulverizer are rotated relatively to pulverize material between the pulverizing surface provided on the top surface of the lower mortar and the pulverizing surface provided on the bottom surface of the upper mortar. The pulverizing surface of the lower mortar is formed in a concave conical shape and the pulverizing surface of the upper mortar is formed in a conical shape matching the concave conical shape. Accordingly, when pulverization is performed between the pulverizing surfaces of the upper and lower mortars, the material is raised along the pulverizing surface of the lower mortar toward its outer peripheral section and slips down along the pulverizing surface, returning toward its central section. This up-and-down movement is repeated. The material can therefore be retained for an extended period of time between the pulverizing surfaces.
    Type: Grant
    Filed: October 6, 1995
    Date of Patent: November 18, 1997
    Assignee: Nipponkoatsudenki Kabushikikaisha
    Inventor: Shoji Takaoka
  • Patent number: 5333032
    Abstract: In a system for transforming input circuit information into information of a logic circuit composed of actual elements, a schematic diagram of a logic circuit composed of actual elements is displayed. A timing check is executed on the displayed logic circuit. A delay adjustment portion of the displayed schematic diagram is designated. A timing adjustment is executed by the system on the designated delay adjustment portion, and thereby the logic circuit is transformed into a second logic circuit composed of actual elements.
    Type: Grant
    Filed: March 12, 1991
    Date of Patent: July 26, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noriko Matsumoto, Shoji Takaoka, Masahiko Ueda, Tamotsu Nishiyama