Patents by Inventor Shoji Temma

Shoji Temma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5966511
    Abstract: The state monitoring system includes a plurality of objects of monitor of the same kind, a monitor unit for monitoring the plurality of objects of monitor to determine if any of them malfunctions, and a consolidating unit interposed between the plurality of objects of monitor and the monitor unit. The consolidating unit consolidates alarm signals sent from the objects of monitor for each group of objects of monitor. When detecting, on the basis of the result of consolidation, that one of each group of objects of monitor has malfunctioned, the consolidating unit notifies an associated monitor unit of the occurrence of one fault. When detecting that two or more objects of monitor have malfunctioned, the consolidating unit notifies the associated monitor unit of the occurrence of a plurality of faults.
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: October 12, 1999
    Assignee: Fujitsu Limited
    Inventor: Shoji Temma
  • Patent number: 5796996
    Abstract: In the case where a CPU executes a write instruction of a control program for a memory mapped register of an external memory, a write address and write data are written into an output buffer, thereby completing the write instruction. Prior to executing a read instruction subsequent to the write instruction, the write address and the write data of the output buffer are transferred to a sync buffer and are stored into a write address holding register and a write data holding register. Further, a using state display register is set into the holding state. When the CPU executes the read instruction, the write data of the write data holding register is written into the memory mapped register and the end of the writing operation is synchronized with the end of the read instruction. When the sync buffer unit receives an interruption instruction in the holding state, an interruption return instruction address is returned to an address of the write instruction of the data in the holding state.
    Type: Grant
    Filed: July 14, 1995
    Date of Patent: August 18, 1998
    Assignee: Fujitsu Limited
    Inventors: Shoji Temma, Jun Funaki