Patents by Inventor Shoji Yasunaga

Shoji Yasunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220093502
    Abstract: An electronic module includes a wiring board including a lower surface on which a second electrode pad including a bonding surface is located, a lead electrically connected to the second electrode pad with solder therebetween, and a sealer to seal the lead. The lead includes an exposed section exposed to outside the sealer and a main body section extending from the exposed section toward the wiring board and including a tip end portion near the wiring board. The tip end portion is connected to the second electrode pad with the solder therebetween. A thickness of the solder between a tip end surface of the tip end portion and the bonding surface of the second electrode pad in a direction orthogonal or substantially orthogonal to the bonding surface is non-uniform.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 24, 2022
    Inventor: Shoji YASUNAGA
  • Patent number: 10825758
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: November 3, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Akihiro Koga
  • Publication number: 20190378787
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Application
    Filed: August 23, 2019
    Publication date: December 12, 2019
    Inventors: Shoji YASUNAGA, Akihiro KOGA
  • Patent number: 10504822
    Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: December 10, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Mamoru Yamagami
  • Patent number: 10431529
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: October 1, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Akihiro Koga
  • Publication number: 20180366397
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Application
    Filed: August 28, 2018
    Publication date: December 20, 2018
    Inventors: Shoji YASUNAGA, Akihiro KOGA
  • Patent number: 10083900
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Grant
    Filed: April 25, 2017
    Date of Patent: September 25, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Akihiro Koga
  • Patent number: 9991213
    Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).
    Type: Grant
    Filed: October 11, 2016
    Date of Patent: June 5, 2018
    Assignee: Rohm Co., Ltd.
    Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
  • Publication number: 20180130725
    Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 10, 2018
    Inventors: Shoji YASUNAGA, Mamoru YAMAGAMI
  • Publication number: 20180068972
    Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 8, 2018
    Applicant: ROHM CO., LTD.
    Inventor: Shoji YASUNAGA
  • Patent number: 9905499
    Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: February 27, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Mamoru Yamagami
  • Patent number: 9837373
    Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: December 5, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Shoji Yasunaga
  • Publication number: 20170229382
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Application
    Filed: April 25, 2017
    Publication date: August 10, 2017
    Inventors: Shoji YASUNAGA, Akihiro KOGA
  • Publication number: 20170162485
    Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.
    Type: Application
    Filed: February 22, 2017
    Publication date: June 8, 2017
    Inventors: Shoji YASUNAGA, Mamoru YAMAGAMI
  • Patent number: 9653377
    Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: May 16, 2017
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Akihiro Koga
  • Patent number: 9613883
    Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution]A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: April 4, 2017
    Assignee: ROHM CO., LTD.
    Inventors: Shoji Yasunaga, Mamoru Yamagami
  • Publication number: 20170084569
    Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.
    Type: Application
    Filed: December 6, 2016
    Publication date: March 23, 2017
    Applicant: ROHM CO., LTD.
    Inventor: Shoji YASUNAGA
  • Publication number: 20170033056
    Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).
    Type: Application
    Filed: October 11, 2016
    Publication date: February 2, 2017
    Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
  • Patent number: 9543239
    Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: January 10, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Shoji Yasunaga
  • Patent number: 9502339
    Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).
    Type: Grant
    Filed: February 4, 2016
    Date of Patent: November 22, 2016
    Assignee: Rohm Co., Ltd.
    Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga