Patents by Inventor Shoji Yasunaga
Shoji Yasunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220093502Abstract: An electronic module includes a wiring board including a lower surface on which a second electrode pad including a bonding surface is located, a lead electrically connected to the second electrode pad with solder therebetween, and a sealer to seal the lead. The lead includes an exposed section exposed to outside the sealer and a main body section extending from the exposed section toward the wiring board and including a tip end portion near the wiring board. The tip end portion is connected to the second electrode pad with the solder therebetween. A thickness of the solder between a tip end surface of the tip end portion and the bonding surface of the second electrode pad in a direction orthogonal or substantially orthogonal to the bonding surface is non-uniform.Type: ApplicationFiled: December 1, 2021Publication date: March 24, 2022Inventor: Shoji YASUNAGA
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Patent number: 10825758Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: GrantFiled: August 23, 2019Date of Patent: November 3, 2020Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Akihiro Koga
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Publication number: 20190378787Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: ApplicationFiled: August 23, 2019Publication date: December 12, 2019Inventors: Shoji YASUNAGA, Akihiro KOGA
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Patent number: 10504822Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.Type: GrantFiled: January 11, 2018Date of Patent: December 10, 2019Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Mamoru Yamagami
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Patent number: 10431529Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: GrantFiled: August 28, 2018Date of Patent: October 1, 2019Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Akihiro Koga
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Publication number: 20180366397Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: ApplicationFiled: August 28, 2018Publication date: December 20, 2018Inventors: Shoji YASUNAGA, Akihiro KOGA
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Patent number: 10083900Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: GrantFiled: April 25, 2017Date of Patent: September 25, 2018Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Akihiro Koga
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Patent number: 9991213Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).Type: GrantFiled: October 11, 2016Date of Patent: June 5, 2018Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Publication number: 20180130725Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.Type: ApplicationFiled: January 11, 2018Publication date: May 10, 2018Inventors: Shoji YASUNAGA, Mamoru YAMAGAMI
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Publication number: 20180068972Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.Type: ApplicationFiled: November 13, 2017Publication date: March 8, 2018Applicant: ROHM CO., LTD.Inventor: Shoji YASUNAGA
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Patent number: 9905499Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.Type: GrantFiled: February 22, 2017Date of Patent: February 27, 2018Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Mamoru Yamagami
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Patent number: 9837373Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.Type: GrantFiled: December 6, 2016Date of Patent: December 5, 2017Assignee: ROHM CO., LTD.Inventor: Shoji Yasunaga
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Publication number: 20170229382Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: ApplicationFiled: April 25, 2017Publication date: August 10, 2017Inventors: Shoji YASUNAGA, Akihiro KOGA
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Publication number: 20170162485Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution] A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.Type: ApplicationFiled: February 22, 2017Publication date: June 8, 2017Inventors: Shoji YASUNAGA, Mamoru YAMAGAMI
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Patent number: 9653377Abstract: A semiconductor device includes two or more semiconductor elements, a lead with island portions on which the semiconductor elements are mounted, a heat dissipation member for dissipating heat from the island portions, a bonding layer bonding the island portions and the heat dissipation member, and a sealing resin covering the semiconductor elements, the island portions and a part of the heat dissipation member. The bonding layer includes mutually spaced individual regions provided for the island portions, respectively.Type: GrantFiled: June 16, 2016Date of Patent: May 16, 2017Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Akihiro Koga
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Patent number: 9613883Abstract: [Object] A semiconductor device is configured to release heat from semiconductor chips more efficiently. [Means for Solution]A semiconductor device includes: a die pad 11 which has a die pad main surface 111 and a die pad rear surface 112; a semiconductor chip 41 mounted on the die pad main surface 111; a sealing resin portion 7 formed with a recess 75 for exposure of the die pad rear surface 11 and covering the die pad 11 and the semiconductor chip 41; and a heat releasing layer 6 disposed in the recess 75. The recess 75 has a recess groove 753 outside the die pad 11 in a direction in which the die pad rear surface 112 extends, and the recess groove 753 is closer to the die pad main surface 111 than to the die pad rear surface 112. The heat releasing layer 6 has a junction layer which is in contact with the die pad rear surface 112 and having part thereof filling the recess groove 753.Type: GrantFiled: May 27, 2015Date of Patent: April 4, 2017Assignee: ROHM CO., LTD.Inventors: Shoji Yasunaga, Mamoru Yamagami
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Publication number: 20170084569Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.Type: ApplicationFiled: December 6, 2016Publication date: March 23, 2017Applicant: ROHM CO., LTD.Inventor: Shoji YASUNAGA
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Publication number: 20170033056Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).Type: ApplicationFiled: October 11, 2016Publication date: February 2, 2017Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga
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Patent number: 9543239Abstract: A semiconductor device includes a semiconductor chip, a lead arranged on a side portion of the semiconductor chip, and a wire, whose one end and another end are bonded to the semiconductor chip and the lead respectively, having a ball portion and a stitch portion wedged in side elevational view on the semiconductor chip and the lead respectively. An angle of approach of the wire to the lead is not less than 50°, and the length of the stitch portion is not less than 33 ?m.Type: GrantFiled: March 2, 2016Date of Patent: January 10, 2017Assignee: ROHM CO., LTD.Inventor: Shoji Yasunaga
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Patent number: 9502339Abstract: A resin-encapsulated semiconductor device having a semiconductor chip which is prevented from being damaged. The resin-encapsulated semiconductor device (100) comprises a semiconductor chip (1) including a silicon substrate, a die pad (10) to which the semiconductor chip (1) is secured through a first solder layer (2), a resin-encapsulating layer (30) encapsulating the semiconductor chip (1), and lead terminals (21) electrically connected to the semiconductor chip (1) and including inner lead portion (21b) covered with the resin-encapsulating layer (30). The lead terminals (21) are made of copper or a copper alloy. The die pad (10) is made of 42 alloy or a cover alloy and has a thickness (about 0.125 mm) less than the thickness (about 0.15 mm) of the lead terminals (21).Type: GrantFiled: February 4, 2016Date of Patent: November 22, 2016Assignee: Rohm Co., Ltd.Inventors: Yasumasa Kasuya, Motoharu Haga, Shoji Yasunaga