Patents by Inventor Shomit Dutta

Shomit Dutta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11354463
    Abstract: A solver may generate a system of equations for an acausal model. A partitioning engine may transform at least some of the equations into groups of equations whose inputs/outputs are connected directly. The partitioning engine may transform at least some of the equations into groups of linear equations and/or groups of switched linear equations that are connected through nonlinear functions. The solver may determine input-output relationships of the groups of equations. A simulation model generator that may include a library of types of model elements may construct a causal simulation model.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: June 7, 2022
    Assignee: The MathWorks, Inc.
    Inventors: Mohamed Babaali, Wurigen Bo, Kiran K. Kintali, Shomit Dutta, Ebrahim M. Mestchian, Naman Saraf
  • Patent number: 10936769
    Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: March 2, 2021
    Assignee: The MathWorks, Inc.
    Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
  • Publication number: 20190332732
    Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.
    Type: Application
    Filed: May 10, 2019
    Publication date: October 31, 2019
    Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
  • Publication number: 20190095303
    Abstract: Systems and methods evaluate simulation models and measure floating point arithmetic errors in terms of Unit in Last Place (ULP). The simulation model may include model elements that perform numerical computations using Native Floating Point (NFP) arithmetic. The model elements may be arranged to implement a procedure. A data store may include local ULP errors predetermined for the model elements. The systems and methods may retrieve the local ULP errors for the model elements included in the model, and may apply a rules-based analysis to compute an overall ULP error of the simulation model. The systems and methods may present the overall ULP computed for the model. The systems and methods may also present intermediate ULP errors determined for portions of the simulation model. Changes may be made to the model to reduce the overall ULP error.
    Type: Application
    Filed: November 21, 2018
    Publication date: March 28, 2019
    Inventors: Kiran K. Kintali, Shomit Dutta, E. Mehran Mestchian, Pieter J. Mosterman
  • Patent number: 10140099
    Abstract: Systems and methods generate code from an executable model. The model may operate on variables having floating point data types. The systems and methods may unpack the sign, exponent, and mantissa components of the floating point variables, and interpret them as boolean, integer, or fixed-point data types. The systems and methods may include operators that operate on the extracted sign, exponent, and mantissa components, and that produce sign, exponent, and mantissa outputs having boolean, integer or fixed-point data types. The systems and methods may pack the sign, exponent, and mantissa components of the output into an integer and reinterpret the integer as a floating point data type. Having replaced the floating point data types with boolean, integer or fixed-point data types, the generated code may be suitable for programmable logic devices and/or microcontrollers that lack Floating Point Units (FPUs).
    Type: Grant
    Filed: January 4, 2017
    Date of Patent: November 27, 2018
    Assignee: The MathWorks, Inc.
    Inventors: Kiran K. Kintali, Shomit Dutta, Anand S. Krishnamoorthi, Ebrahim Mehran Mestchian
  • Publication number: 20170351493
    Abstract: Systems and methods generate code from an executable model. The model may operate on variables having floating point data types. The systems and methods may unpack the sign, exponent, and mantissa components of the floating point variables, and interpret them as boolean, integer, or fixed-point data types. The systems and methods may include operators that operate on the extracted sign, exponent, and mantissa components, and that produce sign, exponent, and mantissa outputs having boolean, integer or fixed-point data types. The systems and methods may pack the sign, exponent, and mantissa components of the output into an integer and reinterpret the integer as a floating point data type. Having replaced the floating point data types with boolean, integer or fixed-point data types, the generated code may be suitable for programmable logic devices and/or microcontrollers that lack Floating Point Units (FPUs).
    Type: Application
    Filed: January 4, 2017
    Publication date: December 7, 2017
    Inventors: Kiran K. Kintali, Shomit Dutta, Anand S. Krishnamoorthi, Ebrahim Mehran Mestchian