Abstract: When a fault occurs on a data communication processor that controls data communication between information processors, all information processors connected to the data communication processor are notified of the occurrence of the fault, upon which the information processors automatically reset the data communications processors. A fault detector is provided in an interface controller in a data communications processor 101, a crossbar switch 108, and an arbitration controller 109. When a fault occurs, the fault processor in the interface controller is notified of the occurrence and the failed location by means of a broadcast signal. The fault processor notifies the information processor of the fault by means of an interrupt signal. The notified information processor instructs the data communications processor to reset each controller of the data communication processor for fault recovery.