Abstract: A semiconductor device includes a metal body; a bonding layer placed on the metal body; and a semiconductor chip placed on the bonding layer. The bonding layer includes a filler-containing first layer formed between the metal body and the semiconductor chip and a second layer bonded to the first layer and the semiconductor chip. The second layer has a thermal expansion coefficient higher than that of the first layer.

Abstract: A semiconductor device includes a metal body; a bonding layer placed on the metal body; and a semiconductor chip placed on the bonding layer. The bonding layer includes a filler-containing first layer formed between the metal body and the semiconductor chip and a second layer bonded to the first layer and the semiconductor chip. The second layer has a thermal expansion coefficient higher than that of the first layer.

Abstract: Provided are a metal bonding member having both a high adhesion strength and an excellent heat cycle reliability and a fabrication method of the same. A metal bonding member has a solder layer formed on at least a part of the surface of a metal substrate. The metal bonding member has an adhesion layer formed of metal particles having an excellent wettability with the solder layer in the interface between the solder layer and the metal substrate. The adhesion layer is partially buried in the metal substrate to form an anchor layer.

Abstract: Although a larger battery and higher filling of an active material are essential to produce a high capacity battery, a longer time is required for permeation of an electrolytic solution at this case. An electrode membrane formed on the surface of a electrode is configured as an electrode membrane structure combining a mixture layer in which density of an active material is high while the electrolytic solution is difficult to permeate because of small void size and a mixture layer in which an electrolytic solution is easy to permeate while density of an active material is low because of large void size. Permeation time of an electrolytic solution can be reduced in a manner that the mixture layer having large void size acts as a supply path for the electrolytic solution.

Abstract: To prevent any uneven solder wetting in a main surface of electrodes of a semiconductor connected with a main surface of a planar lead and any displacement of the lead vis-a-vis the electrodes due to the reflow of the solder in a semiconductor module having the semiconductor element mounted on a substrate and the planar lead electrically connected therewith, the present invention provides an improved semiconductor module characterized in that the width of at least a part of the region of the main surface of the lead facing the semiconductor element is expanded wider than or equal to the width of the electrodes formed on the semiconductor element, and preferably the other part of the main surface of the lead soldered to an electrode formed on the substrate is split in the extending direction thereof.

Abstract: The invention provides an air-fuel ratio control system in which high precision can be applied to the air-fuel ratio feedback control of an engine by using a gas sensor mainly configured by an oxygen sensor that prevents the deterioration of the holding power of sealing material which enables high density filling with a small compressive load or the deterioration of the sealing material. The gas sensor such as the oxygen sensor is based upon a gas content detecting sensor that includes a gas content detecting element and a holder holding the gas content detecting element and that seals a measuring part of the gas content detecting element in the holder by a sealing part in which the sealing material is compressively filled, and has a characteristic that the sealing material is molded by mixed powder including plural species of forms of particles.

Abstract: A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.

Abstract: Disclosed is a low thermal resistance surface mount component and a mounting substrate bump-connected therewith, capable of removing a soldered low thermal resistance surface mount component from a circuit board without harming the performance of the circuit board or the performance of the low thermal resistance surface mount component. The solder bumps 3 in an area approaching the periphery 2 of the low thermal resistance surface mount component 1 are composed of a solder of a melting point lower than that of the solder bumps 3 in an area approaching the center. The low thermal resistance surface mount component 1 on the circuit board can be removed by partial heating and by melting the solder bumps. However, when the component is partially heated in this manner, the heating temperature declines approaching the periphery compared to that of the center of the low thermal resistance surface mount component 1.

Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.

Abstract: A semiconductor module of the present invention comprises a first conductive layer (film) and a second conductive layer (film) which are separately formed on the main surface of a packed substrate, a thermal diffusion plate connected by solder to the upper surface of the first conductive layer, a semiconductor element connected by solder to the upper surface of the thermal diffusion plate, and a lead having one end connected by solder to the second conductive layer and the other end connected by solder to the semiconductor element, wherein the outer periphery of the connected region where the semiconductor element is connected by solder to the upper surface of the thermal diffusion plate is formed with protrusion parts protruding up from the connecting region and a turning of the semiconductor element in the upper surface of the thermal diffusion plate in the solder connecting process is suppressed by the protrusion parts.

Abstract: To prevent any uneven solder wetting in a main surface of electrodes of a semiconductor connected with a main surface of a planar lead and any displacement of the lead vis-a-vis the electrodes due to the reflow of the solder in a semiconductor module having the semiconductor element mounted on a substrate and the planar lead electrically connected therewith, the present invention provides an improved semiconductor module characterized in that the width of at least a part of the region of the main surface of the lead facing the semiconductor element is expanded wider than or equal to the width of the electrodes formed on the semiconductor element, and preferably the other part of the main surface of the lead soldered to an electrode formed on the substrate is split in the extending direction thereof.

Abstract: A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10?6/° C. to 8×10?6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.

Abstract: The present invention provides a semiconductor device comprising a semiconductor element and a copper member which are bonded to each other by a bismuth-based (Bi-based) bonding material having its melting temperature of not less than 250° C., wherein silver (Ag) is diffused in a region of the bonding material in the vicinity of an interface thereof to the semiconductor element with an inclination of concentration of the silver from the interface, in order to realize a manufacture of the semiconductor device without using lead (Pb) at low cost.

Abstract: A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3×10?6/° C. to 8×10?6/° C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250° C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250° C.

Abstract: In order to provide a two-dimensionally arrayed probe (element packaging structure) in which a multilayer element can be used as a piezoelectric ceramic transducer element, each defective element can be replaced and the ill connection of each element can be repaired, and in order to provide a multilayer electric part suitable for realizing such an element packaging structure, the multilayer electronic part is configured with a multilayer chip-like element having a surface electrode, an internal electrode and a back electrode on the one hand and a flexible board attached to one side surface of the chip-like element on the other hand, alternate ones of the electrodes along the multilayer of the chip-like element are connected electrically to each other by the electrode pattern of the flexible board thereby to form two electrode groups, and the end portions of the electrode pattern of the flexible board are used as the two electrode portions for external connection which are electrically connected to the two ele

Abstract: A via interconnection of a glass-ceramic wiring board is made by blending a copper powder to a vehicle including a cellulose derivative, adding a metal oxide powder having a mean particle diameter of from at least 1 &mgr;m to at most 4 &mgr;m to the vehicle and blending them, adjusting the viscosity of the vehicle by adding the cellulose derivative and filling them to a via; and sintering the via at a temperature of at least 900° C. to at most 1060° C., and forming the via interconnection.

Abstract: A glass-ceramic wiring board includes an insulating substrate, a via disposed in the insulating substrate and a via interconnection filling the interior of the via. The via interconnection is sintered material having metal particles. The metal particles have a cross-sectional area per one metal particle surrounded by a metal particle boundary of less than 2000 &mgr;2, which can be determined by cutting, etching and examining a cross-section of the via.

Abstract: In a ceramic wiring board which comprises a copper via, breaks and defects of via interconnections resulting from enlargement of copper particles in the interior of the via during sintering, are prevented.

Abstract: In a ceramic wiring board which comprises a copper via, breaks and defects of via interconnections resulting from enlargement of copper particles in the interior of the via during sintering, are prevented.

Abstract: In the present invention, a thin film capacitor, having a dielectric layer of a metal oxide having perovskite crystal structure, is formed on a first substrate before the capacitor is transferred onto a second substrate on which an electronic circuit has been formed. Thereafter, patterning of the capacitor and electrical connection are to be carried out.