Abstract: A non-volatile storage apparatus that comprises a plurality of planes of non-volatile memory cells is capable of concurrently programming memory cells in multiple planes. In order to screen for failure of the programming process in a subset of planes, the completion of programming of a fastest plane to a particular data state is used as a trigger to test for program failure of other planes to a different data state. In one embodiment, the test for program failure of other planes to the different data state comprises determining if the memory cells of the other planes that are targeted for programming to the different data state have successfully completed verification of programming for the different data state. The programming process is stopped for those planes that fail the test.

Abstract: A non-volatile storage apparatus that comprises a plurality of planes of non-volatile memory cells is capable of concurrently programming memory cells in multiple planes. In order to screen for failure of the programming process in a subset of planes, the completion of programming of a fastest plane to a particular data state is used as a trigger to test for program failure of other planes to a different data state. In one embodiment, the test for program failure of other planes to the different data state comprises determining if the memory cells of the other planes that are targeted for programming to the different data state have successfully completed verification of programming for the different data state. The programming process is stopped for those planes that fail the test.

Abstract: The non-volatile memory includes a control circuitry that is communicatively coupled to an array of memory cells that are arranged in a plurality of word lines. The control circuitry is configured to program the memory cells of the plurality of word lines to a plurality of data states in a multi-pass programming operation. A later programming pass of the multi-pass programming operation includes a plurality of programming loops with incrementally increasing programming pulses. For at least one data state, the later programming pass includes maintaining a count of the programming loops of the later programming pass. The later programming pass also includes inhibiting or slowing programming of the memory cells being programmed to one of the data states during a predetermined program count verify (PCV) programming loop and a PCV?1 programming loop and skipping a verify operation for all programming loops prior to a PCV+1 programming loop.

Abstract: The non-volatile memory includes a control circuitry that is communicatively coupled to an array of memory cells that are arranged in a plurality of word lines. The control circuitry is configured to program the memory cells of the plurality of word lines to a plurality of data states in a multi-pass programming operation. A later programming pass of the multi-pass programming operation includes a plurality of programming loops with incrementally increasing programming pulses. For at least one data state, the later programming pass includes maintaining a count of the programming loops of the later programming pass. The later programming pass also includes inhibiting or slowing programming of the memory cells being programmed to one of the data states during a predetermined program count verify (PCV) programming loop and a PCV?1 programming loop and skipping a verify operation for all programming loops prior to a PCV+1 programming loop.

Abstract: A four-wheel drive vehicle in which, when a switching request is made for switching from a non-meshing state to a meshing state, the control device calculates a first rotation speed difference between the drive-power-source-side meshing teeth and the sub-drive-wheel-side meshing teeth, and a second rotation speed difference between the drive-power-source-side meshing teeth and the sub-drive-wheel-side meshing teeth. If at least one of the calculated first and second rotation speed differences is within a predetermined range set in advance, the control device couples the sub-drive wheel corresponding to the rotation speed difference within the predetermined range, to the central axle by the control coupling to switch the dog clutch from the non-meshing state to the meshing state. And, if neither the calculated first nor second rotation speed difference is within the predetermined range, the control device prohibits switching of the dog clutch from the non-meshing state to the meshing state.

Abstract: Non-volatile memory cells are programmed by applying a programming signal as a series of programming voltage pulses (or other doses of programming) to selected memory cells and verifying the memory cells between programming voltage pulses. To achieve tighter threshold voltage distributions, a coarse/fine programming process is used that includes a two step verification between programming voltage pulses comprising an intermediate verify condition and a final verify condition. Memory cells being programmed that have reached the intermediate verify condition are slowed down for further programming. Memory cells being programmed that have reached the final verify condition are inhibited from further programming. To reduce the number of verify operations performed, a system is proposed for skipping verification at the intermediate verify condition for some programming voltage pulses and skipping verification at the final verify condition for some programming voltage pulses.

Abstract: An electronic control unit executes gradual reduction control when a friction clutch is to be maintained in a fully engaged state such that an input rotary member and an output rotary member rotate integrally. As a result, a motor current supplied to a motor is adjusted to a lower current value. Thus, an average current value of the motor current supplied to the motor when the friction clutch is to be maintained in the fully engaged state is appropriately reduced.

Abstract: A four-wheel drive vehicle in which, when a switching request is made for switching from a non-meshing state to a meshing state, the control device calculates a first rotation speed difference between the drive-power-source-side meshing teeth and the sub-drive-wheel-side meshing teeth, and a second rotation speed difference between the drive-power-source-side meshing teeth and the sub-drive-wheel-side meshing teeth. If at least one of the calculated first and second rotation speed differences is within a predetermined range set in advance, the control device couples the sub-drive wheel corresponding to the rotation speed difference within the predetermined range, to the central axle by the control coupling to switch the dog clutch from the non-meshing state to the meshing state. And, if neither the calculated first nor second rotation speed difference is within the predetermined range, the control device prohibits switching of the dog clutch from the non-meshing state to the meshing state.

Abstract: An electronic control unit executes gradual reduction control when a friction clutch is to be maintained in a fully engaged state such that an input rotary member and an output rotary member rotate integrally. As a result, a motor current supplied to a motor is adjusted to a lower current value. Thus, an average current value of the motor current supplied to the motor when the friction clutch is to be maintained in the fully engaged state is appropriately reduced.

Abstract: A memory device includes memory cells arranged in NAND strings between select gate transistors. A threshold voltage (Vth) distribution of the select gate transistors is evaluated, such as in response to a program, erase or read command involving a block or sub-block of memory cells. For example, a lower tail and an upper tail of the Vth distribution can be evaluated using read voltages. If the Vth is out-of-range, such as due to read disturb, data retention loss or defects in the memory device, the block or sub-block is marked as being bad and previously-programmed data in the block or sub-block can be copied to another location. If the Vth is in range, the command can be executed. Also, a control gate voltage for the select gate transistors can be set based on a Vth metric which is obtained from the evaluation.

Abstract: A memory device includes memory cells arranged in NAND strings between select gate transistors. A threshold voltage (Vth) distribution of the select gate transistors is evaluated, such as in response to a program, erase or read command involving a block or sub-block of memory cells. For example, a lower tail and an upper tail of the Vth distribution can be evaluated using read voltages. If the Vth is out-of-range, such as due to read disturb, data retention loss or defects in the memory device, the block or sub-block is marked as being bad and previously-programmed data in the block or sub-block can be copied to another location. If the Vth is in range, the command can be executed. Also, a control gate voltage for the select gate transistors can be set based on a Vth metric which is obtained from the evaluation.

Abstract: A programming techniques adaptively sets a pass voltage and an initial program voltage based on a programming speed of a set of memory cells. In one pass of a multi-pass programming operation, a programming speed-indicating program voltage is obtained. For example, this can be a final program voltage or a program voltage at another programming milestone. A pass voltage is determined for another programming pass of the multi-pass programming operation, by providing an adjustment to a reference pass voltage. An initial program voltage is determined for the another programming pass based on an offset from the programming speed-indicating program voltage. The initial program voltage is further adjusted to counteract an effect of the adjustment to a reference pass voltage. The adjustment to the initial program voltage is opposite in polarity and smaller in magnitude than the adjustment to the reference pass voltage.

Abstract: A programming techniques adaptively sets a pass voltage and an initial program voltage based on a programming speed of a set of memory cells. In one pass of a multi-pass programming operation, a programming speed-indicating program voltage is obtained. For example, this can be a final program voltage or a program voltage at another programming milestone. A pass voltage is determined for another programming pass of the multi-pass programming operation, by providing an adjustment to a reference pass voltage. An initial program voltage is determined for the another programming pass based on an offset from the programming speed-indicating program voltage. The initial program voltage is further adjusted to counteract an effect of the adjustment to a reference pass voltage. The adjustment to the initial program voltage is opposite in polarity and smaller in magnitude than the adjustment to the reference pass voltage.