Patents by Inventor Shotaro BABA

Shotaro BABA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942539
    Abstract: A semiconductor device includes a polycrystalline silicon part buried in a termination region of a silicon layer. The polycrystalline silicon part contacts the silicon layer, has a higher crystal grain density than the silicon layer, and includes a heavy metal. The silicon layer includes a drift layer located in a cell region and the termination region. The drift layer has a lower first-conductivity-type impurity concentration than a silicon substrate. The drift layer includes a same element of heavy metal as the heavy metal included in the polycrystalline silicon part.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: March 26, 2024
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Shotaro Baba, Hiroaki Katou, Yuhki Fujino, Kouta Tomita
  • Publication number: 20240079459
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode; a fourth electrode, a semiconductor member, a first conductive member, a second conductive member, and an insulating member. The semiconductor member includes first, second and third semiconductor regions. The first semiconductor region includes a first outer edge region, a first partial region, a second partial region, a third partial region, and a fourth partial region. The first, third and fourth partial regions are of a first conductivity type. The second semiconductor region is of a second conductivity type. The third semiconductor region is of the first conductivity type. The second conductive member includes a first conductive portion. The insulating member includes a first insulating region and a second insulating region. An electrical resistivity of the second partial region is higher than an electrical resistivity of the first partial region.
    Type: Application
    Filed: February 14, 2023
    Publication date: March 7, 2024
    Inventors: Yusuke KOBAYASHI, Tomoaki INOKUCHI, Hiro GANGI, Shotaro BABA
  • Publication number: 20240038713
    Abstract: According to one embodiment, a semiconductor chip includes a first electrode, a semiconductor layer, a second electrode, a third electrode, and a metallic layer. The semiconductor layer includes a first portion, a second portion, and a third portion that is located between the first portion and the second portion. The semiconductor layer is provided on a first side of the first electrode in a first direction. The second electrode is over the first portion in the first direction. The third electrode is over the second portion in the first direction. The metallic layer is provided on a second side of the first electrode and is under the third portion in the first direction.
    Type: Application
    Filed: March 1, 2023
    Publication date: February 1, 2024
    Inventors: Shotaro Baba, Masatoshi Arai, Katsura Miyashita, Tsuyoshi Kachi
  • Publication number: 20240030344
    Abstract: According to one embodiment, a semiconductor device includes a first element. The first element includes a first conductive member, a second conductive member, a first semiconductor member, a third conductive member, and a third conductive member wiring. The first conductive member includes a first conductive portion including a first face and a second conductive portion including a second face. The second conductive member includes a third conductive portion including a third face and a fourth conductive portion including a fourth face. The fourth conductive portion includes a facing conductive portion. The first semiconductor member is of a first conductive type. The first semiconductor member includes a first partial region, a second partial region and a third partial region. The third partial region includes a facing face facing the facing conductive portion. The third conductive member wiring is electrically connected to the third conductive member.
    Type: Application
    Filed: February 21, 2023
    Publication date: January 25, 2024
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Tomoaki INOKUCHI, Hiro GANGI, Yusuke KOBAYASHI, Tatsuya NISHIWAKI, Shotaro BABA, Hiroki NEMOTO, Tatsunori SAKANO
  • Publication number: 20230378340
    Abstract: According to one embodiment, a semiconductor device includes first and second electrodes, first to third semiconductor regions, and a gate electrode. The first semiconductor region is located on the first electrode. The second semiconductor region is located on the first semiconductor region, and includes a first contact region. The third semiconductor region is located on a portion of the second semiconductor region. The third semiconductor region includes a second contact region. A concentration of a first element in the second contact region is less than a concentration of the first element in the first contact region. The first element is at least one selected from the group consisting of platinum group elements and gold. The gate electrode faces the second semiconductor region via a gate insulating layer. The second electrode is located on the second and third semiconductor regions and contacts the first and second contact regions.
    Type: Application
    Filed: December 19, 2022
    Publication date: November 23, 2023
    Inventors: Kenji KIKUCHI, Tsuyoshi KACHI, Shotaro BABA
  • Patent number: 11777028
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other-end portion. The first conductive member includes a first conductive member end portion and a first conductive member other-end portion. The first conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to fourth semiconductor regions. The first semiconductor region includes first and second partial regions. The third semiconductor region is electrically connected with the second electrode. The fourth semiconductor region is electrically connected with the first electrode. At least a portion of the first insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the first conductive member.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: October 3, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke Kobayashi, Akihiro Goryu, Ryohei Gejo, Hiro Gangi, Tomoaki Inokuchi, Shotaro Baba, Tatsuya Nishiwaki, Tsuyoshi Kachi
  • Publication number: 20230197810
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a semiconductor member, a first conductive member, a connecting member, a first member, and an insulating member. The semiconductor member includes first to third semiconductor regions. The first semiconductor region is between the first electrode and the third semiconductor region. The first semiconductor region includes first to third partial regions. The second semiconductor region is between the first and third semiconductor regions. The second semiconductor region includes third and fourth semiconductor portions. The third semiconductor region includes first and second semiconductor portions. The second electrode is electrically connected with the third semiconductor region. The third electrode includes a first electrode portion. The first conductive member includes first to third conductive regions. The connecting member is electrically connected with the first conductive member.
    Type: Application
    Filed: June 29, 2022
    Publication date: June 22, 2023
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shotaro BABA, Hiro GANGI, Hiroaki KATOU, Saya SHIMOMURA, Shingo SATO
  • Publication number: 20230073420
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, and a semiconductor layer between the first electrode and the second electrode. A third electrode is in the semiconductor layer. The third electrode extends in a second direction orthogonal to the first direction. A plurality of fourth electrodes are connected to the second electrode and extend in the first direction into the semiconductor layer. The fourth electrodes are spaced from one another along the second direction. A fifth electrode that is electrically isolated from the first electrode and between the first electrode and the plurality of fourth electrodes. The fifth electrode extends in the second direction and contacts the lower ends of the plurality of fourth electrodes in the trench.
    Type: Application
    Filed: February 28, 2022
    Publication date: March 9, 2023
    Inventors: Shotaro BABA, Hiroaki KATOU, Saya SHIMOMURA, Tatsuya NISHIWAKI
  • Publication number: 20220360702
    Abstract: An image processing device includes an image generation unit (212) that generates, in an IR image frame, a first IR image captured in a state in which a pulse wave is on and a second IR image captured in a state in which the pulse wave is off, and an image correction unit (213) that corrects the first IR image on the basis of the second IR image.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 10, 2022
    Inventors: SHOTARO BABA, TAKASHI KUSAKARI
  • Patent number: 11462637
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third conductive members, a semiconductor member, and a first insulating member. The semiconductor member includes a first semiconductor region provided on the first conductive member, a second semiconductor region provided on a portion of the first semiconductor region, and a third semiconductor region provided on the second semiconductor region. An impurity concentration in the third semiconductor region is greater than in the first semiconductor region. The second conductive member includes a first conductive portion electrically connected to the second and third semiconductor regions. The third conductive member is provided on an other portion of the first semiconductor region. At least a portion of the first insulating member is between the semiconductor member and the third conductive member.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: October 4, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Shotaro Baba, Yusuke Kobayashi, Hiroaki Katou, Toshifumi Nishiguchi
  • Publication number: 20220310837
    Abstract: A semiconductor device includes a polycrystalline silicon part buried in a termination region of a silicon layer. The polycrystalline silicon part contacts the silicon layer, has a higher crystal grain density than the silicon layer, and includes a heavy metal. The silicon layer includes a drift layer located in a cell region and the termination region. The drift layer has a lower first-conductivity-type impurity concentration than a silicon substrate. The drift layer includes a same element of heavy metal as the heavy metal included in the polycrystalline silicon part.
    Type: Application
    Filed: September 10, 2021
    Publication date: September 29, 2022
    Inventors: Shotaro BABA, Hiroaki KATOU, Yuhki FUJINO, Kouta TOMITA
  • Publication number: 20220285548
    Abstract: A semiconductor device includes a semiconductor part, first to third electrodes, and a control electrode. The first electrode is provided on a back surface of the semiconductor part. The second electrode is provided at a front surface side of the semiconductor part. The third electrode and the control electrode are provided inside a trench of the semiconductor part. The control electrode includes first and second control portions. The semiconductor device further includes first to third insulating films. The first insulating film is between the control electrode and the semiconductor part. The second insulating film covers the first and second control portions. The third insulating film is between the second electrode and the second insulating film. The third insulating film includes a portion extending between the first and second control portions. The third electrode is between the first electrode and the extension portion of the third insulating film.
    Type: Application
    Filed: August 30, 2021
    Publication date: September 8, 2022
    Inventors: Hiroaki KATOU, Saya SHIMOMURA, Shotaro BABA, Atsuro INADA, Hiroshi YOSHIDA, Yasuhiro KAWAI
  • Publication number: 20220190154
    Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first conductive member, a semiconductor member, and a first insulating member. The third electrode includes a third electrode end portion and a third electrode other-end portion. The first conductive member includes a first conductive member end portion and a first conductive member other-end portion. The first conductive member is electrically connected with one of the second electrode or the third electrode. The semiconductor member includes first to fourth semiconductor regions. The first semiconductor region includes first and second partial regions. The third semiconductor region is electrically connected with the second electrode. The fourth semiconductor region is electrically connected with the first electrode. At least a portion of the first insulating member is between the semiconductor member and the third electrode and between the semiconductor member and the first conductive member.
    Type: Application
    Filed: August 5, 2021
    Publication date: June 16, 2022
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventors: Yusuke KOBAYASHI, Akihiro GORYU, Ryohei GEJO, Hiro GANGI, Tomoaki INOKUCHI, Shotaro BABA, Tatsuya NISHIWAKI, Tsuyoshi KACHI
  • Publication number: 20220085201
    Abstract: According to one embodiment, a semiconductor device includes first, second, and third conductive members, a semiconductor member, and a first insulating member. The semiconductor member includes a first semiconductor region provided on the first conductive member, a second semiconductor region provided on a portion of the first semiconductor region, and a third semiconductor region provided on the second semiconductor region. An impurity concentration in the third semiconductor region is greater than in the first semiconductor region. The second conductive member includes a first conductive portion electrically connected to the second and third semiconductor regions. The third conductive member is provided on an other portion of the first semiconductor region. At least a portion of the first insulating member is between the semiconductor member and the third conductive member.
    Type: Application
    Filed: March 4, 2021
    Publication date: March 17, 2022
    Inventors: Shotaro Baba, Yusuke Kobayashi, Hiroaki Katou, Toshifumi Nishiguchi
  • Patent number: 11137295
    Abstract: According to one embodiment, a sensor includes a supporter, a film portion, a first element, and a first magnetic portion. The supporter includes a first support portion and a second support portion. The film portion includes a first partial region supported by the first support portion. The first element is provided at the first partial region. The first element includes a first electrode region, a first opposing electrode region, and a first magnetic layer provided between the first electrode region and the first opposing electrode region. A direction from the second support portion toward the first magnetic portion is aligned with a first direction. The first direction is from the first opposing electrode region toward the first electrode region. At least a portion of the first magnetic portion overlaps at least a portion of the first element in a direction crossing the first direction.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: October 5, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shotaro Baba, Yoshihiko Fuji, Kazuaki Okamoto, Shiori Kaji, Tomohiko Nagata, Yoshihiro Higashi, Akiko Yuzawa, Michiko Hara
  • Patent number: 11137281
    Abstract: According to one embodiment, a sensor includes a structure body, an element portion, and a power line. The structure body includes a supporter and a film portion. The film portion is supported by the supporter and includes an end portion. The end portion is aligned with a first direction and supported by the supporter. The element portion includes a first element provided at the film portion. The first element includes a first magnetic layer, a first opposing magnetic layer provided between the first magnetic layer and the film portion, and a first nonmagnetic layer provided between the first magnetic layer and the first opposing magnetic layer. A second direction from the first opposing magnetic layer toward the first magnetic layer crosses the first direction. The power line is electrically insulated from the element portion. The power line includes a portion aligned with the first direction.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: October 5, 2021
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshihiro Higashi, Yoshihiko Fuji, Kazuaki Okamoto, Shotaro Baba, Michiko Hara
  • Patent number: 10902986
    Abstract: According to one embodiment, a sensor includes a deformable film portion, and a first sensing element provided at the film portion. The first sensing element includes a first magnetic layer, a second magnetic layer, and a first intermediate layer provided between the first and second magnetic layers. The first intermediate layer is nonmagnetic. The first magnetic layer includes a first film including Fe and Co, a second film including Fe and Co, a third film, and a fourth film. The third film includes at least one selected from the group consisting of Cu, Au, Ru, Ag, Pt, Pd, Ir, Rh, Re, and Os and is provided between the first and second films. The fourth film includes at least one selected from the group consisting of Mg, Ca, Sc, Ti, Sr, Y, Zr, Nb, Mo, Ba, La, Hf, Ta, and W and is provided between the third and second films.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: January 26, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuaki Okamoto, Yoshihiko Fuji, Shiori Kaji, Yoshihiro Higashi, Tomohiko Nagata, Shotaro Baba, Michiko Hara
  • Patent number: 10883815
    Abstract: According to one embodiment, a sensor includes a film portion, one or more detectors fixed to the film portion, and a processor. The detector includes first and second detecting elements. The first detecting element includes a first magnetic layer. The second detecting element includes a second magnetic layer. A first change rate of a first signal is higher than a second change rate of the first signal. The first signal corresponds to a first electrical resistance of the first detecting element. A change rate of a second signal with respect to the change of the magnitude of the strain is higher than the second change rate. The second signal corresponds to a second electrical resistance of the second detecting element. The processor is configured to perform at least a first operation of outputting a second value. The second value is based on the second signal and a first value.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: January 5, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiko Fuji, Yoshihiro Higashi, Michiko Hara, Kazuaki Okamoto, Shotaro Baba
  • Patent number: 10863908
    Abstract: A sensor includes a structure body including a deforming portion, and a first sensing element provided at the deforming portion. The first sensing element includes first to fourth magnetic layers and a first intermediate layer. The first magnetic layer is provided between the second and third magnetic layers. The fourth magnetic layer is provided between the first and third magnetic layers. The first intermediate layer is provided between the second and first magnetic layers. The third magnetic layer includes at least one of a first material or a second material. The first material includes at least one selected from the group consisting of Ir—Mn, Pt—Mn, Pd—Pt—Mn, and Ru—Rh—Mn. The second material includes at least one of CoPt, (CoxPt100-x)100-yCry, or FePt. A crystallinity of at least a portion of the fourth magnetic layer is higher than a crystallinity of the first magnetic layer.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: December 15, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuaki Okamoto, Yoshihiko Fuji, Yoshihiro Higashi, Shotaro Baba, Michiko Hara
  • Patent number: 10788545
    Abstract: According to one embodiment, a sensor includes a supporter, a first film portion, a first sensing element, and a first magnetic portion. The first film portion is supported by the supporter, is deformable, and includes a first fixed end extending along a first fixed end direction. A first sensing element is fixed to the first film portion, and includes a first magnetic layer, a first opposing magnetic layer provided between the first magnetic layer and the first film portion, and a first intermediate layer provided between the first magnetic layer and the first opposing magnetic layer. A direction from the first opposing magnetic layer toward the first magnetic layer is aligned with a first element direction. The first magnetic portion includes a first end portion extending along a first end portion direction tilted with respect to the first fixed end direction, and overlaps a portion of the supporter.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: September 29, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shotaro Baba, Yoshihiko Fuji, Akiko Yuzawa, Kei Masunishi, Michiko Hara, Shiori Kaji, Tomohiko Nagata, Yoshihiro Higashi, Kazuaki Okamoto