Abstract: An information processing system includes one or more information processing apparatuses having processing circuitry. The processing circuitry receives, from a first terminal, input specifying an arrangement and usage of a logical device on architectural drawing data of a building, and registers an arrangement position and an operation setting associated with the drawing data. The processing circuitry also receives identification information of a physical device and a hub from a second terminal, registers the identification information, and pairs the physical device with the hub. After installation of the physical device and the hub in the building, a floor plan image showing the arrangement position of the logical device is displayed on a third terminal. When an arrangement position is designated on the floor plan image, identification information read from a physical device or a hub installed at the position is associated with the logical device.

Abstract: A method of manufacturing a semiconductor device involves mounting a semiconductor chip, formed on top with a main electrode and a subelectrode smaller in area than the main electrode, on a die pad of an external lead frame through a first bonding material, mounting an inner lead frame in which plural inner leads for connecting the main electrode and the subelectrode on the chip to corresponding connecting pads of the external lead frame are joined together by a tie bar on the chip and the external lead frame through a second bonding material, heating the first and second bonding materials simultaneously for electrically connecting and fixing the chip to the die pad and the inner leads to the electrodes on the chip and the connecting pads of the external lead frame, and cutting the tie bar to separate the inner lead frame into the plural inner leads.

Abstract: A method of manufacturing a semiconductor device involves mounting a semiconductor chip, formed on top with a main electrode and a subelectrode smaller in area than the main electrode, on a die pad of an external lead frame through a first bonding material, mounting an inner lead frame in which plural inner leads for connecting the main electrode and the subelectrode on the chip to corresponding connecting pads of the external lead frame are joined together by a tie bar on the chip and the external lead frame through a second bonding material, heating the first and second bonding materials simultaneously for electrically connecting and fixing the chip to the die pad and the inner leads to the electrodes on the chip and the connecting pads of the external lead frame, and cutting the tie bar to separate the inner lead frame into the plural inner leads.

Abstract: A method of manufacturing a semiconductor device involves mounting a semiconductor chip, formed on top with a main electrode and a subelectrode smaller in area than the main electrode, on a die pad of an external lead frame through a first bonding material, mounting an inner lead frame in which plural inner leads for connecting the main electrode and the subelectrode on the chip to corresponding connecting pads of the external lead frame are joined together by a tie bar on the chip and the external lead frame through a second bonding material, heating the first and second bonding materials simultaneously for electrically connecting and fixing the chip to the die pad and the inner leads to the electrodes on the chip and the connecting pads of the external lead frame, and cutting the tie bar to separate the inner lead frame into the plural inner leads.