Abstract: A printed circuit board (PCB) includes a receiver component, a transmission line including a positive signal transmission line and a negative signal transmission line, a transmitter component, and a capacitance unit. The transmitter component transmits a different signal to the receiver component via the transmission line. The capacitance unit is spaced from the receiver component a predetermined distance S, therein, the predetermined distance S is calculated by a formula S=Vx (n*UI?(C1+C2)×Zo/2)/2, and V is a speed of the transmission line. C1 is an equivalent capacitance value of the receiver component, C2 is a capacitance value of the capacitance unit, Zo is a resistance value of the transmission line, UI is a half of one cycle of the differential signal, and n is a value less than or equal to 1.5 and greater than or equal to 0.5.

Abstract: A printed circuit board includes a baseboard, first and second conductive wires, a fuse, a 5V connector, a USB connector, and a CPU. The 5V connector is electrically connected to a first end of the fuse through the first conductive wire, and electrically connected to a voltage pin of the CPU voltage regulating chip through the second conductive wire. A voltage pin of the USB connector is connected to a second end of the fuse. The 5V connector outputs a 5V system voltage to the USB connector through the first conductive wire and the fuse, thus providing a voltage to a USB device, and also outputs the 5V system voltage to the CPU voltage regulating chip through the second conductive wire, thus signaling the CPU voltage regulating chip to convert the 5V system voltage and provide the converted voltage to a CPU.

Abstract: In a data processing device and a method for analyzing stability of the data processing device, one or more sets of equalization parameters and a predetermined bit error ratio (BER) are received. Times and voltages of data points that represent a waveform of an electronic signal generated by the data processing device are read, and an output type of the electronic signal is selected to obtain a time interval of outputs of the electronic signal. Optimal equalization parameters are selected from the one or more sets of equalization parameters to compute a sample interval. Interfering voltages of the electronic signal are computed to select a frequency which is equal to the predetermined BER, and the interfering voltages corresponding to the selected frequency are obtained. An eye pattern is established using the interfering voltages corresponding to the selected frequency, and a determination is made according to the eye pattern.

Abstract: A computer-based method for checking signal transmission lines of a printed circuit board (PCB) layout is provided. A design rules is set according to different length requirements and the quantity of storage devices input by users. A group of transmission line from a displayed PCB layout is selected. The quantity of branch lines of each transmission line to be checked and the length of each branch line of the group of transmission lines to be checked are computed. The design of which branch lines does not satisfy the design rules is determined according to the computed quantity of the branch lines of each transmission line to be checked, the length of each branch line of the group of transmission lines, and the design rules.

Abstract: A method for checking signal transmission lines of a printed circuit board (PCB) layout includes determining differential pairs to be checked and dividing the differential pairs to be checked into a first group and a second group. A first reference distance between differential pairs belonging to the same group and a second reference distance between differential pairs belonging to different groups are set. A first box surrounding each line section of one to be checked signal differential line of the first group and a second box surrounding the first box are created. One first box surrounding each line section of the to be checked differential line of the second group is created. Whether or not in the first box and the second box there are differential lines which do not satisfy design standards is determined.

Abstract: An exemplary guideway mechanism includes four branches each including two parallel rails, four groups of connecting blocks each including four connecting blocks arranged at four corners of an imaginary square, and four supporting brackets each connecting one corresponding group of connecting blocks. Adjacent ends of the rails of each branch respectively connect two adjacent connecting blocks. Each of two ends of each rail connects one corresponding connecting block. Two adjacent rails respectively located in two adjacent branches are perpendicular to each other and connected together by a respective connecting block of one corresponding group of connecting blocks. The other two rails respectively located in the two adjacent branches connect another two respective connecting blocks of the one corresponding group of connecting blocks. The whole guideway mechanism is frame-shaped.

Abstract: A robotic arm control system is provided. In, the robotic arm control system, any three points A, B, and C of an object to be determined are picked, thereby creating an original coordinate system. A robotic arm is directed to rotate around the x-axis of the original coordinate system to reach the points B and C. During the rotation of the robotic arm, the three points A, B, and C are recorded by a visual process. A non-linear mapping relation of the original coordinate system and the operation coordinate system is calculated according to length ratios, an angular ratio, and a differential ratio of the difference of the length ratios to the angle between the line A-B and the line A-C, thereby controlling the movement of the robotic arm according to the non-linear mapping relation. The disclosure further provides a robotic arm control method.

Abstract: A control system for a server includes a control chip, a switch module, a hardware power module, a software power module, a power chip, and a basement management controller (BMC) chip. The hardware power module and the software power module output first and second power signals, respectively. The control chip outputs corresponding state signals according to a control signal outputted by the BMC chip. The switch module selectively outputs the first or the second power signals to the power supply chip, to control the power supply chip to perform corresponding power operations.

Abstract: In a method for optimizing an order in which certain points on a circuit board can be tested and evaluated, a coordinate system is established in a circuit diagram of a circuit board, and at least one locating point is preset. When an operator selects a signal path routing within the circuit diagram, the method can display the testing points in the selected signal path routing on a display device. After calculating the distance between each of the testing points and each of the at least one locating point, a group of distances is obtained. By comparing the distances, the minimum distance can be determined from the group of distances. The method further optimizes the order of the testing points according to the distance between each of the testing points and the locating point that consists of the minimum distance.

Abstract: A storage expansion system includes an expansion apparatus and a serial advanced technology attachment dual in-line memory module (SATA DIMM) device. A memory slot, a SATA interface, and a first power interface are all arranged on the expansion apparatus. The memory slot includes a protrusion, first power pins connected to the power interface, first ground pins, and first signal pins connected to the SATA interfaces. A control chip, storage chips connected to the control chip, a power unit connected to the control chip and the storage chips are all arranged on the SATA DIMM device. An edge connector and a notch arranged along a bottom edge of the SATA DIMM device to be detachably engaged in the memory slot. The edge connector includes second power pins connected to the power unit, second ground pins, and second signal pins connected to the control chip.

Abstract: A via design method includes doing a simulation according to input data to obtain the impedance of the via of the reference printed circuit board (PCB). An optimal via model is determined according to a group of input data. Simulating is performed according to the thickness of a PCB to-be-designed and the optimal via model data, to obtain the impedance of a via of a PCB to be designed. The number of the anti-pads of the via of the PCB to be designed is recorded when the difference between the impedance of the via of the PCB to be designed and the impedance of the via model of the reference PCB does not fall within a preset range. An interval between each two adjacent anti-pads of the via of the PCB to designed is determined according to the recorded number and the thickness of the PCB to be designed.

Abstract: A cloud server and method controls one or more robots. The cloud server receives location information of each robot. A robot closest to a task location where a task is taken according to the location information. The cloud server of the data center sends a command to the located robot to move to the task location, where the command defines a task of the located robot to perform.

Abstract: In a method for testing the charging and discharging reliability of a rechargeable battery, a test device measures the battery to obtain first terminal voltages and first electric currents when the battery is charged by a power supply. After the battery is discharged, the test device measures the battery to obtain second terminal voltages and second electronic currents. Based on the first terminal voltages and the first electric currents, a first lifecycle curve can be created. Based on the second terminal voltages and the second electric currents, a second lifecycle curve is created. The method compares the first lifecycle curve with a charging lifecycle curve, compares the second lifecycle curve with a discharging lifecycle curve, and generates a lifecycle estimation report of the rechargeable battery according to the comparison results.

Abstract: A computing device and a method for scattering parameter equivalent circuit reads a scattering parameter file from a storage device. A non-common-pole rational function of the scattering parameters in the scattering parameter file is created by applying a vector fitting algorithm to the scattering parameters. Passivity of the non-common-pole rational function is enforced if the non-common-pole rational function does not satisfy a determined passivity requirement.

Abstract: A data center includes a plurality of electronic devices, a plurality of cooling devices, and a power supply system. Each electronic device includes a power supply unit (PSU). The power supply system includes an alternating current (AC) power supply, an energy router electrically connected to the AC power supply to receive power from the AC power supply, and a high voltage direct current transmission (HVDC) system. The HVDC system is electrically connected to the energy router, each PSU, and each cooling device. The HVDC system receives power form the energy router, converts the received power into a high voltage direct current, and outputs the high voltage direct current to each PSU and each cooling device. Each PSU converts the high voltage direct current into an operation voltage of the electronic device to power the electronic device.

Abstract: A via design method includes doing a simulation according to input data to obtain the impedance of the via of the reference printed circuit board (PCB). An optimal via model is determined according to a group of input data. Simulating is performed according to the thickness of a PCB to-be-designed and the optimal via model data, to obtain the impedance of a via of a PCB to be designed. The number of the anti-pads of the via of the PCB to be designed is recorded when the difference between the impedance of the via of the PCB to be designed and the impedance of the via model of the reference PCB does not fall within a preset range. An interval between each two adjacent anti-pads of the via of the PCB to designed is determined according to the recorded number and the thickness of the PCB to be designed.

Abstract: A robot arm includes a support arm, an adjusting rod and a detecting unit. The adjusting rod rotatably extends through the support arm. The detecting unit is attached to the adjusting rod. The detecting unit includes an image capture device and a probe device. The image capture device captures images of a workpiece. The probe device includes a driving device and a probe. The driving device may drive the probe to move between a first position where the probe does not visually prevent images of the workpiece being captured by the image capture device, and a second position where the probe does block the images of the workpiece being captured by the image capture device.

Abstract: A computer determines a first origin of a first coordinate system of a PCB, and controls a robotic arm to position a probe above the first origin. Furthermore, the computer determines a second origin of a second coordinate system of the robotic arm, and determines displacement values from the first origin to a test point in controlling movements of the robotic arm in the second coordinate system. A graph representing the test point is recognized in an image of the PCB, pixel value differences between the graph center and the image center are determined and converted to displacement correction values for controlling the movements of the robotic arm and determining 3D coordinates of the test point. The robotic arm is moved along a Z-axis of the second coordinate system to precisely position the probe on the test point of the PCB.

Abstract: A system and method for checking a ground via of control chips of a printed circuit board (PCB) provides a graphical user interface (GUI) displaying a layout of the PCB. The control chip has a plurality of ground pins. The computer searches for signal path routing of each ground pin and ground vias along each signal path routing of each ground pin. If there are any ground vias having the same absolute coordinates, the computer determines that the ground vias are shared by more than one ground pin.

Abstract: A method for checking signal transmission lines of a printed circuit board (PCB) layout includes determining differential pairs to be checked and dividing the differential pairs to be checked into a first group and a second group. A first reference distance between differential pairs belonging to the same group and a second reference distance between differential pairs belonging to different groups are set. A first box surrounding each line section of one to be checked signal differential line of the first group and a second box surrounding the first box are created. One first box surrounding each line section of the to be checked differential line of the second group is created. Whether or not in the first box and the second box there are differential lines which do not satisfy design standards is determined.