Patents by Inventor Shougo Hayashi

Shougo Hayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8592816
    Abstract: A thin film transistor matrix device including an insulating substrate with a plurality of lines arranged on the substrate, where the lines include first lines and second lines. The device also includes a first connection line extending in a direction transverse to the plurality of lines, where the first connection line and the first lines are configured and arranged to be electrically connected to each other, as well as a second connection line extending in a direction transverse to the plurality of lines, where the second connection line and the second lines are also configured and arranged to be electrically connected to each other. The first and second connection lines are both formed on the same side of an image display region, when considered in plan view. Finally, the plurality of lines are associated, respectively, with drain bus lines and/or gate bus lines.
    Type: Grant
    Filed: July 19, 2012
    Date of Patent: November 26, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Patent number: 8553188
    Abstract: A liquid crystal display device comprising a liquid crystal layer including liquid crystal molecules provided between a first substrate and a second substrate; pixels forming a display area; electrodes for applying a voltage across the liquid crystal layer within each of the pixels; a plurality of domain regulating structures for dividing orientations of the liquid crystal molecules and forming multiple domains within each of the pixels, when a predetermined voltage is applied across the liquid crystal layer within each of the pixels. The device also includes a structure which is formed in an outer area located next to the display area, but that does not overlap the display area, and is substantially the same as at least one of the plurality of domain regulating structures.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: October 8, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20130015451
    Abstract: A thin film transistor matrix device including an insulating substrate; a plurality of lines arranged on the substrate, with the lines being defined as odd-number-th lines alternating with even-number-th lines; a first connection line extending in a direction transverse to the plurality of lines, where the first connection line and the odd-number-th lines are configured and arranged to be electrically connected/disconnected to/from each other; and a second connection line extending in a direction transverse to the plurality of lines, where the second connection line and the ven-number-th lines are configured and arranged to be electrically connected/disconnected to/from each other.
    Type: Application
    Filed: July 19, 2012
    Publication date: January 17, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Patent number: 8258513
    Abstract: A thin film transistor matrix device including an insulating substrate and a plurality of lines arranged on the substrate. The lines are defined as odd-number-th lines alternating with even-number-th lines. A first connection line extends in a direction transverse to the plurality of lines. The first connection line and the odd-number-th lines are configured and arranged to be electrically connected to each other. A second connection line extends in a direction transverse to the plurality of lines. The second connection line and the even-number-th lines are configured and arranged to be electrically connected to each other. The first connection line and the second connection line are both formed on the same side of an image display region, when considered in plan view.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: September 4, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Publication number: 20120120338
    Abstract: A liquid crystal display device comprising a liquid crystal layer including liquid crystal molecules provided between a first substrate and a second substrate; pixels forming a display area; electrodes for applying a voltage across the liquid crystal layer within each of the pixels; a plurality of domain regulating structures for dividing orientations of the liquid crystal molecules and forming multiple domains within each of the pixels, when a predetermined voltage is applied across the liquid crystal layer within each of the pixels; and a structure which is formed in an outer area located next to the display area and is substantially the same as at least one of the plurality of domain regulating structures.
    Type: Application
    Filed: January 25, 2012
    Publication date: May 17, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: 8134671
    Abstract: A liquid crystal display device including a pair of substrates sandwiching liquid crystal molecules, a plurality of gate bus lines, and a plurality of data bus lines, with each of the data bus lines extending to intersect the gate bus lines and bending in a zigzag manner. A plurality of pixels are formed in areas enclosed by the data and gate bus lines, with a plurality of pixel electrodes, each covering a substantial area of one of the pixels. A plurality of domain regulating structures for regulating orientation directions of the liquid crystal molecules and for forming multiple domains are formed in each of the pixels. At least one of the domain regulating structures bends along a first side edge of the pixel electrode and domains are divided in accordance with the bending of the domain regulating structure.
    Type: Grant
    Filed: March 29, 2011
    Date of Patent: March 13, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20110176098
    Abstract: A vertically alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The disclosed liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Application
    Filed: March 29, 2011
    Publication date: July 21, 2011
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: 7965363
    Abstract: A liquid crystal display device including a common electrode on a first substrate, a pixel electrode on a second substrate, and a liquid crystal layer between the first and second substrates. The device also include first and second alignment control structures formed, respectively, on the first and second substrates, for regulating azimuths of orientations of the liquid crystal when a voltage is applied thereto. The first and second alignment control structures each include a first line portion (extending in a first direction) and a second line portion (extending in a second direction, which is different from the first direction). The pixel electrode includes an edge extending in a direction different from both the first and second directions.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: June 21, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: 7947982
    Abstract: A thin film transistor matrix device including an insulating substrate, a plurality of thin film transistors (TFTs) on the insulating substrate, and a plurality of picture element electrodes (connected to the TFTs) on the insulating substrate in a matrix to define an image display region. A first conductor is on the insulating substrate. A first insulating film is on the first conductor, a second conductor is on the first insulating film, and a second insulating film is over the first insulating film and the second conductor. A first contact hole is formed in the first and second insulating films, a second contact hole is formed in the second insulating film, and a conducting connection is formed between the first and second contact holes. The first and second conductors are connected to the conducting connection via the first and second contact holes, respectively, which are both outside the image display region.
    Type: Grant
    Filed: June 22, 2009
    Date of Patent: May 24, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Patent number: 7947983
    Abstract: A thin film transistor matrix device including an insulating substrate, a plurality of thin film transistors (TFTs) on the insulating substrate, and a plurality of picture element electrodes on the insulating substrate in a matrix to define an image display region. A first conducting film is on the insulating substrate. A first insulating film is on the first conducting film. A second conducting film is on the first insulating film, and a second insulating film is over the first insulating film and the second conducting film. A first conducting connection is formed, outside the image display region, to pass through the first and second insulating films, and to electrically connect the first conducting film to a third conducting film. A second conducting connection is formed, outside the image display region, to pass through the second insulating film and to electrically connect the second conducting film to the third conducting film.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: May 24, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Patent number: 7821603
    Abstract: A vertical alignment type liquid crystal display device including a plurality of pixels, which further includes a first substrate and a second substrate and a liquid crystal layer between the first substrate and the second substrate. The first substrate and the second substrate include alignment control structures which extend linearly, and when viewed in a direction vertical to the first substrate, in a pixel, the alignment control structure of the first substrate and the alignment control structures of the second substrate are arranged alternately. The alignment control structure of the first substrate includes first and second linear portions, and distances between the first and second linear portions and an adjacent alignment control structure of the second substrate are different from each other. Additionally, each of the first and second linear portions and the alignment control structures of the second substrate are arranged in parallel.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: October 26, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20100214202
    Abstract: A method for fabricating a thin film transistor matrix device which includes forming a transparent insulating substrate, arranging a plurality of thin film transistors on the substrate in a matrix, arranging a plurality of picture element electrodes on the substrate in a matrix and connecting the picture element electrodes to sources of the thin film transistors. The method also includes forming a plurality of bus lines for commonly connecting gates or drains of the thin film transistors, forming a plurality of bus line terminals on the ends of the bus lines, respectively, with each bus line terminal being provided for each bus line, and forming one connection line on the substrate in a region outer of plurality of the bus line terminals and commonly connecting the plurality of bus lines. The method further includes the step of electrically disconnecting the bus lines from the connection line by laser melting.
    Type: Application
    Filed: April 29, 2010
    Publication date: August 26, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Patent number: 7760305
    Abstract: A liquid crystal display device that includes a plurality of pixels, a first substrate and a second substrate, as well as a liquid crystal layer provided between the first and second substrates. A first alignment structure and a second alignment structure are formed on the first substrate, and a third alignment structure and a fourth alignment structure are formed on the second substrate, for controlling an alignment of the liquid crystal. At least one auxiliary alignment structure is also formed on the first substrate for controlling an alignment of liquid crystals. The first and second alignment structures extend linearly in different directions from each other in a pixel, and the third and fourth alignment structures extend parallel to the first and second alignment structures, respectively. Also, the auxiliary alignment structure extends substantially along an edge of the pixel.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: July 20, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20100117087
    Abstract: A method for fabricating a thin film transistor matrix device which includes forming a transparent insulating substrate, arranging a plurality of thin film transistors on the substrate in a matrix, arranging a plurality of picture element electrodes on the substrate in a matrix and connecting the picture element electrodes to sources of the thin film transistors. The method also includes forming a plurality of bus lines for commonly connecting gates or drains of the thin film transistors, forming a plurality of bus line terminals on the ends of the bus lines, respectively, with each bus line terminal being provided for each bus line, and forming one connection line on the substrate in a region outer of plurality of the bus line terminals and commonly connecting the plurality of bus lines. The method further includes the step of electrically disconnecting the bus lines from the connection line by laser melting.
    Type: Application
    Filed: January 15, 2010
    Publication date: May 13, 2010
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Patent number: 7690035
    Abstract: A system for preventing fraud of certification information performs a processing step of processing web page data, a first comparing step of comparing the web page data processed in the processing step with web page data stored in a web page storage unit in association with URL of the data, a second comparing step of comparing URLs of the web page data similar to each other when the first comparing step determines that the web page data are similar to each other, and an address attention message adding step of adding an address attention message to the web page data processed in the processing step when the second comparing step determines that the URLs differ. Therefore, a user who is to access a web site can determine whether or not this web site is authentic, and certification information fraud can be prevented beforehand.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: March 30, 2010
    Assignee: Fujitsu Limited
    Inventors: Taiji Sasage, Shougo Hayashi
  • Publication number: 20090256153
    Abstract: A method for fabricating a thin film transistor matrix device which includes forming a transparent insulating substrate, arranging a plurality of thin film transistors on the substrate in a matrix, arranging a plurality of picture element electrodes on the substrate in a matrix and connecting the picture element electrodes to sources of the thin film transistors. The method also includes forming a plurality of bus lines for commonly connecting gates or drains of the thin film transistors, forming a plurality of bus line terminals on the ends of the bus lines, respectively, with each bus line terminal being provided for each bus line, and forming one connection line on the substrate in a region outer of plurality of the bus line terminals and commonly connecting the plurality of bus lines. The method further includes the step of electrically disconnecting the bus lines from the connection line by laser melting.
    Type: Application
    Filed: June 22, 2009
    Publication date: October 15, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Publication number: 20090207360
    Abstract: A vertically alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The disclosed liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Application
    Filed: April 28, 2009
    Publication date: August 20, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: 7575960
    Abstract: A method for fabricating a thin film transistor matrix device which includes forming a transparent insulating substrate, arranging a plurality of thin film transistors on the substrate in a matrix, arranging a plurality of picture element electrodes on the substrate in a matrix and connecting the picture element electrodes to sources of the thin film transistors. The method also includes forming a plurality of bus lines for commonly connecting gates or drains of the thin film transistors, forming a plurality of bus line terminals on the ends of the bus lines, respectively, with each bus line terminal being provided for each bus line, and forming one connection line on the substrate in a region outer of plurality of the bus line terminals and commonly connecting the plurality of bus lines. The method further includes the step of electrically disconnecting the bus lines from the connection line by laser melting.
    Type: Grant
    Filed: March 16, 2006
    Date of Patent: August 18, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidaki Takizawa, Shougo Hayashi, Takeshi Kinjo, Makoto Tachibanaki, Kenji Okamoto
  • Publication number: 20080303997
    Abstract: A vertically alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The disclosed liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Application
    Filed: May 15, 2008
    Publication date: December 11, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: RE43123
    Abstract: A vertical alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage is applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: January 24, 2012
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Sasabayashi, Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Kenji Okamoto, Tsuyoshi Kamada, Shougo Hayashi, Hideaki Takizawa, Keiji Imoto, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Satoshi Murata