Abstract: A system for developing the preceding logic to be implemented in a built-in microcomputer that is used while being incorporated in an electronic control unit. The system includes: a motherboard having a first CPU, a first memory, and a first interface via which the motherboard communicates with the outside, interconnected over a first internal bus; a core board having a second CPU, a second memory, quasi microcomputer peripheral devices, which simulate by software the peripheral devices of a microcomputer, and a second interface via which the core board communicates with the outside, interconnected over a second internal bus; and a PCI bus that links the motherboard and the core board. The development system is substituted for the built-in microcomputer in order to implement the preceding logic.

Abstract: A signal processing device includes a start time obtaining part that obtains a start time when a predetermined process is started in response to an interrupt request associated with a valid edge of a pulse input signal, an edge occurrence time obtaining part that obtains a time of occurrence of the valid edge of the pulse input signal after the start time of the predetermined process is obtained, and a processing part that selectively performs a process based on a time relationship between the start time of the predetermined process and the time of occurrence of the valid edge.

Abstract: A microcomputer logic development device realizing high speed sampling RAM monitoring by connecting an existing RAM measurement device, provided with a first block providing functions corresponding to a microcomputer core, a second block having functions corresponding to microcomputer resources, a bus connecting the first and second blocks, and a RAM measurement block provided with a common memory, connected with the bus and RAM measurement device, and realizing a RAM monitor function with respect to the first block, the RAM measurement block realizing a high speed RAM monitoring operation by dividing the timing for processing between the first block and common memory and the timing for processing between the common memory and RAM measurement device.

Abstract: Provided is a logic development system that can ensure the capability of a CPU required for preceding logic, guarantee reliable communication of input/output information, and improve the throughput of the CPU. A logic development system for a built-in microcomputer employed in an electronic control unit (ECU) comprises: a motherboard that accommodates an application facility and a communication facility; a core board that accommodates quasi microcomputer peripheral devices, a, computing facility, and a communication facility and that is connected to the motherboard over a PCI bus; and an interface board that includes circuits equivalent to the hardware of the ECU and that is connected to the core board. The communication facility on the motherboard and each of the quasi microcomputer peripheral devices on the core board transfer data directly to or from each other over the PCI bus linking them.

Abstract: A signal processing device includes a start time obtaining part that obtains a start time when a predetermined process is started in response to an interrupt request associated with a valid edge of a pulse input signal, an edge occurrence time obtaining part that obtains a time of occurrence of the valid edge of the pulse input signal after the start time of the predetermined process is obtained, and a processing part that selectively performs a process based on a time relationship between the start time of the predetermined process and the time of occurrence of the valid edge.

Abstract: Provided is a system for developing the preceding logic to be implemented in a built-in microcomputer that is used while being incorporated in an electronic control unit. The system has a CPU whose capability is good enough to implement the preceding logic. The system comprises: a motherboard having a first CPU, a first memory, and a first interface via which the motherboard communicates with the outside, interconnected over a first internal bus; a core board having a second CPU, a second memory, quasi microcomputer peripheral devices, which simulate by software the peripheral devices of a microcomputer, and a second interface via which the core board communicates with the outside, interconnected over a second internal bus; and a PCI bus that links the motherboard and core board. The development system is substituted for the built-in microcomputer in order to implement the preceding logic.

Abstract: Provided is a system for developing the preceding logic to be implemented in a built-in microcomputer that is used while being incorporated in an electronic control unit. The system has a CPU whose capability is good enough to implement the preceding logic, provides the same assortment of resources as the one to be included in a preceding system, and permits short-term development of a built-in microcomputer that can communicate I/O information reliably and whose CPU enjoys an improved throughput.

Abstract: A microcomputer logic development device realizing high speed sampling RAM monitoring by connecting an existing RAM measurement device, provided with a first block providing functions corresponding to a microcomputer core, a second block having functions corresponding to microcomputer resources, a bus connecting the first and second blocks, and a RAM measurement block provided with a common memory, connected with the bus and RAM measurement device, and realizing a RAM monitor function with respect to the first block, the RAM measurement block realizing a high speed RAM monitoring operation by dividing the timing for processing between the first block and common memory and the timing for processing between the common memory and RAM measurement device.

Abstract: Provided is a logic development system that can ensure the capability of a CPU required for preceding logic, guarantee reliable communication of input/output information, and improve the throughput of the CPU. A logic development system for a built-in microcomputer employed in an electronic control unit (ECU) comprises: a motherboard that accommodates an application facility and a communication facility; a core board that accommodates quasi microcomputer peripheral devices, a, computing facility, and a communication facility and that is connected to the motherboard over a PCI bus; and an interface board that includes circuits equivalent to the hardware of the ECU and that is connected to the core board. The communication facility on the motherboard and each of the quasi microcomputer peripheral devices on the core board transfer data directly to or from each other over the PCI bus linking them.

Abstract: Provided is a system for developing the preceding logic to be implemented in a built-in microcomputer that is used while being incorporated in an electronic control unit. The system has a CPU whose capability is good enough to implement the preceding logic, provides the same assortment of resources as the one to be included in a preceding system, and permits short-term development of a built-in microcomputer that can communicate I/O information reliably and whose CPU enjoys an improved throughput.