Patents by Inventor Shouhei Kousai
Shouhei Kousai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100090745Abstract: Power mixer arrays for providing watt-level power in mobile systems. In one embodiment, a fully-integrated octave-range CMOS power mixer that occupies only 2.6 mm2 using a 130 nm semiconductor process has been demonstrated. The power mixer provides an output power of +31.5 dBm into an external 50 ? load with a power added efficiency (PAE) of 44% at 1.8 GHz and a full power gain compression of only 0.4 dB.Type: ApplicationFiled: September 22, 2009Publication date: April 15, 2010Applicant: California Institute of TechnologyInventors: Shouhei Kousai, Seyed Ali Hajimiri
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Patent number: 7688145Abstract: A variable gain amplifying device that amplifies an input signal and outputs the amplified signal, has a controlling circuit that controls the gain by controlling turning on and off of first MOS transistors and third MOS transistors so that the sum of the number of first MOS transistors turned on and the number of third MOS transistors turned on is ānā by outputting a control signal to the gates of the first MOS transistors and the third MOS transistors.Type: GrantFiled: September 29, 2008Date of Patent: March 30, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Shouhei Kousai
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Patent number: 7605662Abstract: An oscillator controller has a phase frequency detector that compares a reference signal and a frequency-divided signal and outputs a phase difference signal; a charge pump; a loop filter that filters the phase error signal output from the charge pump and outputs an oscillation frequency controlling voltage; a voltage-controlled oscillator; a first counter that counts the number of waves of the reference signal to a desired number and outputs a first flag signal; a second counter that counts the number of waves of the frequency-divided signal to the desired number and outputs a second flag signal; a first comparator that compares the first flag signal and the second flag signal and outputs a frequency comparison signal; and a control circuit that controls the voltage-controlled oscillator, the first counter, the second counter and the frequency divider by outputting signals thereto.Type: GrantFiled: April 16, 2007Date of Patent: October 20, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Hiroyuki Kobayashi, Shouhei Kousai
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Publication number: 20090253396Abstract: A wireless communication apparatus includes a local oscillator that generates a plurality of LO (Local Oschillation) signals corresponding to frequencies of a plurality of input RF (Radio Frequency) signals, an accumulator that accumulates the plurality of LO signals generated by the local oscillator to generate an accumulated signal, a mixer that mixes the plurality of RF signals and the accumulated signal generated by the accumulator and to generate a plurality of base band signals, and a first signal processing unit that executes a signal process with respect to the plurality of base band signals generated by the mixer.Type: ApplicationFiled: March 20, 2009Publication date: October 8, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Jun DEGUCHI, Shouhei Kousai, Daisuke Miyashita
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Publication number: 20090108927Abstract: A filter adjusting circuit, has: a filter circuit which has a circuit configuration operating as an n-th order filter including n (n?1) integrators and can switch a connection of the circuit configuration to operate as a circuit equivalent to the n integrators; a signal generating circuit that outputs a first signal having a predetermined reference frequency to the filter circuit, and outputs a second signal having the reference frequency; a phase comparator that compares a phase of a third signal and a phase of the second signal and determines a phase shift between the signals, the third signal being obtained by processing the first signal in the filter circuit and outputted from the filter circuit; and a control circuit controls the filter circuit.Type: ApplicationFiled: October 7, 2008Publication date: April 30, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shouhei KOUSAI
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Publication number: 20090085665Abstract: A variable gain amplifying device that amplifies an input signal and outputs the amplified signal, has a controlling circuit that controls the gain by controlling turning on and off of first MOS transistors and third MOS transistors so that the sum of the number of first MOS transistors turned on and the number of third MOS transistors turned on is ānā by outputting a control signal to the gates of the first MOS transistors and the third MOS transistors.Type: ApplicationFiled: September 29, 2008Publication date: April 2, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shouhei Kousai
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Publication number: 20090088201Abstract: A radio apparatus includes a receiver which receives a wirelessly transmitted signal as a reception signal, a transmitter which is provided in the vicinity of the receiver and generates a transmission signal having a frequency different from that of the reception signal, and a reception signal extracting unit which extracts a reception signal from an input signal containing the reception signal and the transmission signal, at a timing of a zero crossing of the transmission signal in the input signal, by using phase information including the phase of the transmission signal from the transmitter.Type: ApplicationFiled: September 30, 2008Publication date: April 2, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shouhei KOUSAI
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Publication number: 20090088123Abstract: A frequency converting circuit that outputs an output signal obtained by mixing a first input signal and a second input signal, has: a first input terminal to which the first input signal is input; a second input terminal to which the second input signal is input; an output terminal from which the output signal is output; a frequency converting element that has a first input part connected to the first input terminal and an output part connected to the output terminal, restricts the signal input to the first input part according to a signal input to a second input part and outputs the restricted signal to the output part; and a pulse controlling circuit that receives the second input signal via the second input terminal and outputs a pulse signal obtained by restricting the pulses of the second input signal to the second input part of the frequency converting element.Type: ApplicationFiled: September 29, 2008Publication date: April 2, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shouhei Kousai, Daisuke Miyashita, Jun Deguchi
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Publication number: 20080303603Abstract: A semiconductor integrated circuit device includes a voltage controlled oscillator which controls a bias current or an oscillation frequency to supply an output signal, a phase-locked loop circuit which supplies a frequency control signal based on the output signal supplied from the voltage controlled oscillator, a peak detection circuit which detects a peak of the frequency control signal supplied from the phase-locked loop circuit, and a bias control circuit which produces a bias current based on the peak detected by the peak detection circuit to supply the bias current. The voltage controlled oscillator controls the bias current supplied from the bias control circuit or the oscillation frequency to supply the output signal based on the frequency control signal supplied from the phase-locked loop circuit.Type: ApplicationFiled: June 5, 2008Publication date: December 11, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shouhei KOUSAI, Daisuke Miyashita
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Publication number: 20080258779Abstract: A semiconductor integrated circuit, has a current source having one end connected to a power supply and outputting a reference current; a first MOS transistor having one end connected to an other end of the current source and being diode-connected; a second MOS transistor having a gate connected to a gate of the first MOS transistor and passing an output current obtained by current-mirroring the reference current; a first variable resistor connected between an other end of the first MOS transistor and a ground; a resistive component connected between an other end of the second MOS transistor and the ground; and a first operational amplifier fed with a first potential of the other end of the first MOS transistor and a second potential of the other end of the second MOS transistor and outputting a signal for controlling a resistance value of the first variable resistor to equalize the first potential and the second potential, wherein the resistance value of the first variable resistor is controlled based on theType: ApplicationFiled: March 19, 2008Publication date: October 23, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Junji Wadatsumi, Shouhei Kousai
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Patent number: 7317363Abstract: There is provided a phase locked loop circuit which receives a reference signal having a reference frequency and a first signal having a first frequency, compares phases of the reference signal and first signal, applies a control voltage based on a phase comparison result to an input terminal of a voltage controlled oscillator to generate a second signal having an oscillation frequency and output the second signal from an output terminal, and supplies the second signal to a divider to divide the frequency of the second signal and output the first signal; and a controller which generates and supplies a control signal to the voltage controlled oscillator, wherein the voltage controlled oscillator has an arrangement in which a coil and variable capacitance are connected in parallel between the input terminal and output terminal, and one of a plurality of capacitances is selectively connected between the input terminal and output terminal by a switch in parallel with the variable capacitance, and ON/OFF of the swType: GrantFiled: December 16, 2005Date of Patent: January 8, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Shouhei Kousai, Hiroyuki Kobayashi
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Publication number: 20070247248Abstract: An oscillator controller, has a phase frequency detector that compares a reference signal and a frequency-divided signal and outputs a phase difference signal; a charge pump that outputs a phase error signal according to the phase difference signal output from said phase frequency detector; a loop filter that filters the phase error signal output from said charge pump and outputs an oscillation frequency controlling voltage; a voltage-controlled oscillator that has an LC resonator having a coil, a variable capacitor connected to the opposite ends of the coil at the opposite ends thereof, and a capacitor connected in series with a switch between the opposite ends of said variable capacitor, the oscillation frequency of the voltage-controlled oscillator being controlled through adjustment of the capacitance value of said variable capacitor by said oscillation frequency controlling voltage; a frequency divider that divides the frequency of the output of said voltage-controlled oscillator and outputs said frequenType: ApplicationFiled: April 16, 2007Publication date: October 25, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hiroyuki Kobayashi, Shouhei Kousai
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Publication number: 20070222489Abstract: A voltage-controlled oscillator, has a tank circuit that has a first inductor having one end connected to a power supply potential, a second inductor having one end connected to said power supply potential, and a first variable capacitor connected between the other end of said first inductor and the other end of said second inductor and having a capacitance controlled in accordance with an oscillation frequency controlling voltage; a first MOS transistor connected between the other end of said first inductor and a ground potential and having the gate connected to the other end of said second inductor; a second MOS transistor connected between the other end of said second inductor and said ground potential and having the gate connected to the other end of said first inductor; a third inductor having one end connected to said power supply potential; a third MOS transistor connected between the other end of said third inductor and said ground potential and having the gate connected to the gate of the first MOS tType: ApplicationFiled: March 26, 2007Publication date: September 27, 2007Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Shouhei Kousai
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Publication number: 20060158264Abstract: According to the present invention, there is provided a frequency synthesizer comprising: a phase locked loop circuit which receives a reference signal having a reference frequency and a first signal having a first frequency, compares phases of the reference signal and first signal, applies a control voltage based on a phase comparison result to an input terminal of a voltage controlled oscillator to generate a second signal having an oscillation frequency and output the second signal from an output terminal, and supplies the second signal to a divider to divide the frequency of the second signal and output the first signal; and a controller which generates and supplies a control signal to the voltage controlled oscillator, wherein the voltage controlled oscillator has an arrangement in which a coil and variable capacitance are connected in parallel between the input terminal and output terminal, and one of a plurality of capacitances is selectively connected between the input terminal and output terminal byType: ApplicationFiled: December 16, 2005Publication date: July 20, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shouhei Kousai, Hiroyuki Kobayashi
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Patent number: 6560768Abstract: In a circuit pattern design method which uses a plurality of standard cells that optimize circuit patterns for function units on the basis of a logic description which describes circuit operation of a semiconductor device, and which method generates a circuit pattern corresponding to charged-particle beam exposure using both a character projection exposure method and a variable shaped beam exposure method, the circuit pattern satisfies a design constraint condition, and a predetermined condition imposed on transfer to a sample or imposed on an aperture mask used in exposure by the character projection exposure method.Type: GrantFiled: June 12, 2001Date of Patent: May 6, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Ryoichi Inanami, Shunko Magoshi, Shouhei Kousai
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Patent number: 6476639Abstract: A semiconductor integrated circuit device is capable of producing an output without being influenced by the other input. The semiconductor integrated circuit device includes a logic circuit designed to process a predetermined logical operation on the basis of an input signal, and an input capacitance equalizing circuit designed to equalize the input capacitance of the logical circuit.Type: GrantFiled: February 21, 2001Date of Patent: November 5, 2002Assignee: Kabushiki Kaisha ToshibaInventors: Shouhei Kousai, Mototsugu Hamada, Tadahiro Kuroda
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Publication number: 20020010905Abstract: In a circuit pattern design method which uses a plurality of standard cells that optimize circuit patterns for function units on the basis of a logic description which describes circuit operation of a semiconductor device, and which method generates a circuit pattern corresponding to charged-particle beam exposure using both a character projection exposure method and a variable shaped beam exposure method, the circuit pattern satisfies a design constraint condition, and a predetermined condition imposed on transfer to a sample or imposed on an aperture mask used in exposure by the character projection exposure method.Type: ApplicationFiled: June 12, 2001Publication date: January 24, 2002Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Ryoichi Inanami, Shunko Magoshi, Shouhei Kousai
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Publication number: 20010015658Abstract: A semiconductor integrated circuit device is capable of producing an output without being influenced by the other input. The semiconductor integrated circuit device includes a logic circuit designed to process a predetermined logical operation on the basis of an input signal, and an input capacitance equalizing circuit designed to equalize the input capacitance of the logical circuit.Type: ApplicationFiled: February 21, 2001Publication date: August 23, 2001Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Shouhei Kousai, Mototsugu Hamada, Tadahiro Kuroda