Patents by Inventor Shouhei Murakami
Shouhei Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7995674Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: GrantFiled: December 29, 2010Date of Patent: August 9, 2011Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Publication number: 20110096865Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: ApplicationFiled: December 29, 2010Publication date: April 28, 2011Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Patent number: 7864881Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2(M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: GrantFiled: February 8, 2007Date of Patent: January 4, 2011Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Patent number: 7817746Abstract: A peak factor reduction unit that never allow peak factor reproduction even when interpolation is done in a succeeding stage. The unit detects a local maximum value of amplitude components from an input complex signal and supplies a complex signal that passes a band limiting baseband filter and an interpolation filter to a correction signal generation unit for generating a correction signal used for peak factor reduction and reduces a peak factor of the input complex signal with use of the correction signal generated from an interpolated complex signal.Type: GrantFiled: July 27, 2007Date of Patent: October 19, 2010Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Hideaki Arai, Shouhei Murakami
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Patent number: 7809078Abstract: An OFDM modulator having a peak factor reduction function. The OFDM modulator has a peak factor reduction unit between an IFFT unit and a guard interval insertion unit thereof. The peak factor reduction unit converts a complex signal X1 outputted from the IFFT unit into a complex signal X2 with a reduced peak factor based on subcarrier map information. The peak factor reduction unit generates a peak factor reduction signal by a linear combination of complex exponential functions that correspond to subcarrier frequencies to be used for wave transmission, as bases. The peak factor reduction signal is derived by repetition of, for example, a weighted least squares method or convolution processing by a fast Fourier transform.Type: GrantFiled: February 6, 2008Date of Patent: October 5, 2010Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Yuji Ishida, Shouhei Murakami, Kenji Yanagi
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Publication number: 20080219372Abstract: An OFDM modulator having a peak factor reduction function. The OFDM modulator has a peak factor reduction unit between an IFFT unit and a guard interval insertion unit thereof. The peak factor reduction unit converts a complex signal X1 outputted from the IFFT unit into a complex signal X2 with a reduced peak factor based on subcarrier map information. The peak factor reduction unit generates a peak factor reduction signal by a linear combination of complex exponential functions that correspond to subcarrier frequencies to be used for wave transmission, as bases. The peak factor reduction signal is derived by repetition of, for example, a weighted least squares method or convolution processing by a fast Fourier transform.Type: ApplicationFiled: February 6, 2008Publication date: September 11, 2008Inventors: Kazuyuki Hori, Yuji Ishida, Shouhei Murakami, Kenji Yanagi
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Publication number: 20080095284Abstract: A peak factor reduction unit that never allow peak factor reproduction even when interpolation is done in a succeeding stage. The unit detects a local maximum value of amplitude components from an input complex signal and supplies a complex signal that passes a band limiting baseband filter and an interpolation filter to a correction signal generation unit for generating a correction signal used for peak factor reduction and reduces a peak factor of the input complex signal with use of the correction signal generated from an interpolated complex signal.Type: ApplicationFiled: July 27, 2007Publication date: April 24, 2008Inventors: Kazuyuki HORI, Hideaki Arai, Shouhei Murakami
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Patent number: 7352316Abstract: In a time-interleaved AD converter which combines together low-speed high-resolution AD converters for effective high speed operation, various deterioration factors possessed by each of the converters, including DC offset, conversion gain error, sampling timing error, and a frequency characteristic, need to be compensated. The compensation is performed through nonlinear filter operation in which a constant term is added to linear filter operation. A high-speed low-resolution AD converter is separately used, and through adaptive signal processing in which an output signal thereof is defined as an instruction signal, a compensation coefficient is calculated. In this condition, the compensation can be performed without the influence of quantization noise attributable to the high-speed low-resolution AD converter.Type: GrantFiled: November 21, 2006Date of Patent: April 1, 2008Assignee: Hitachi Communication Technologies, Ltd.Inventors: Kazuyuki Hori, Yuji Ishida, Toshiaki Kurokawa, Keiichi Hirota, Shouhei Murakami
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Publication number: 20070237260Abstract: There is a need for effectively compensating distortion when a predistortion transmitter is subject to not only a memory effect due to nonlinearity of an amplifier, but also a modulator's DC offset, IQ unbalance, or local quadrature error. A predistortor to be used is a polynomial predistortor including a polynomial basis generation portion and an inner product calculation portion. The polynomial basis generation portion delays a real part and an imaginary part of a complex input signal Sx=Ix+jQx for up to M samples to generate 2 (M+1) signals, duplicately combines these signals to generate monomials having maximum degree N, and outputs, as a basis vector, all or part of the monomials depending or needs. The inner product calculation portion performs an inner product calculation using a coefficient vector, i.e., a set of complex numbers sized equally to the basis vector to find a polynomial value and outputs the value as a complex signal.Type: ApplicationFiled: February 8, 2007Publication date: October 11, 2007Inventors: Kazuyuki Hori, Shouhei Murakami, Yuji Ishida, Tomoya Uchiike, Yoshiaki Hasegawa
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Publication number: 20070120724Abstract: In a time-interleaved AD converter which combines together low-speed high-resolution AD converters for effective high speed operation, various deterioration factors possessed by each of the converters, including DC offset, conversion gain error, sampling timing error, and a frequency characteristic, need to be compensated. The compensation is performed through nonlinear filter operation in which a constant term is added to linear filter operation. A high-speed low-resolution AD converter is separately used, and through adaptive signal processing in which an output signal thereof is defined as an instruction signal, a compensation coefficient is calculated. In this condition, the compensation can be performed without the influence of quantization noise attributable to the high-speed low-resolution AD converter.Type: ApplicationFiled: November 21, 2006Publication date: May 31, 2007Inventors: Kazuyuki Hori, Yuji Ishida, Toshiaki Kurokawa, Keiichi Hirota, Shouhei Murakami
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Patent number: 7161990Abstract: Unlike a prior art digital predistortion compensation device for determining a compensation coefficient based on absolute value information about a baseband complex input signal, the present invention performs distortion compensation calculation in accordance with a complex coefficient polynomial using real and imaginary parts of the baseband complex input signal as its variables.Type: GrantFiled: December 2, 2002Date of Patent: January 9, 2007Assignee: Hitachi, Ltd.Inventors: Kazuyuki Hori, Toshiaki Kurokawa, Shouhei Murakami, Masamitsu Nishikido, Norie Hara
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Publication number: 20030108120Abstract: Unlike a prior art digital predistortion compensation device for determining a compensation coefficient based on absolute value information about a baseband complex input signal, the present invention performs distortion compensation calculation in accordance with a complex coefficient polynomial using real and imaginary parts of the baseband complex input signal as its variables.Type: ApplicationFiled: December 2, 2002Publication date: June 12, 2003Inventors: Kazuyuki Hori, Toshiaki Kurokawa, Shouhei Murakami, Masamitsu Nishikido, Norie Hara