Abstract: A nonvolatile semiconductor memory employs sense amplifiers, circuits for providing stabilized source voltages, and circuits for realizing high-speed and reliable read and write operations. The semiconductor memory has a matrix of nonvolatile erasable memory cell transistors.

Abstract: A nonvolatile semiconductor memory employs sense amplifiers, circuits for providing stabilized source voltages, and circuits for realizing high-speed and reliable read and write operations. The semiconductor memory has a matrix of nonvolatile erasable memory cell transistors.

Abstract: The objects of the present invention are to enhance the operating speed by improving the access speed to a redundant memory, and also to enable a redundant address to be written into an electrically programmable memory device, which stores the redundant address, even for a semiconductor memory designed to operate with a low-voltage, single power supply. In a semiconductor memory according to a first aspect of the invention, an address detection circuit, which determines whether the access is for a replaced element, is constructed with a gate circuit that can be set either to such a state as to enable one of two complementary input signals for output or to a high impedance state, and a signal line, onto which a signal to inhibit the selection of normal memory cells is output upon detection of an address signal for redundancy, is directly controlled by an output of a redundancy memory circuit which stores the state of the redundancy function.

Abstract: An object of the present invention is to ease the dielectric strength requirements for transistors forming power supply circuits or the like. A nonvolatile semiconductor memory of the present invention includes a plurality of memory cells, each of which is composed of a floating gate, a control gate, a drain, and a source, and a negative voltage generating means whose generated negative voltage is applied to the control gate for drawing a charge stored in the floating gate into a channel or the source when stored data is erased electrically. The nonvolatile memory of the present invention further includes positive erasure voltage generating means, and a positive voltage higher than a conventional supply voltage generated by the positive erasure voltage generating means is applied to the channel or the source.