Patents by Inventor Shouichi Kuroha
Shouichi Kuroha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7098970Abstract: In an active matrix type liquid crystal display device comprising a TFT having gate lines and data lines formed in a matrix manner and being connected to a source line, a contact hole for connecting the source line with a pixel electrode is formed in a position overlapping a disclination line. The contact hole is formed in a position overlapping a capacitance portion of the gate line. The gate line and the source line are provided to oppose to each other, and electrostatic capacitance is stored therebetween.Type: GrantFiled: February 25, 2002Date of Patent: August 29, 2006Assignee: NEC LCD Technologies, Ltd.Inventors: Masanobu Hidehira, Michiaki Sakamoto, Shouichi Kuroha, Mamoru Okamoto
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Patent number: 6917392Abstract: The present invention provides a liquid crystal display apparatus of a lateral direction electric field drive type comprising an array substrate including a plurality of TFTs each having a gate electrode, a gate insulation film, a semiconductor layer, and a source electrode/drain electrode formed on a transparent substrate and an opposing substrate arrange so as to oppose to the array substrate, wherein the semiconductor layer has a width in the gate length direction identical to the gate length.Type: GrantFiled: December 15, 2000Date of Patent: July 12, 2005Assignee: NEC LCD Technologies, Ltd.Inventors: Takahisa Hannuki, Shinichi Nishida, Satoshi Ihida, Shouichi Kuroha, Ryuji Takahashi, Satoshi Miura
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Patent number: 6890783Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.Type: GrantFiled: September 12, 2002Date of Patent: May 10, 2005Assignee: NEC LCD Technologies, LTD.Inventors: Shigeru Kimura, Takahiko Watanabe, Tae Yoshikawa, Hiroyuki Uchida, Shusaku Kido, Shinichi Nakata, Tsutomu Hamada, Hisanobu Shimodouzono, Satoshi Doi, Toshihiko Harano, Akitoshi Maeda, Satoshi Ihida, Hiroaki Tanaka, Takasuke Hayase, Shouichi Kuroha, Hirofumi Ihara, Kazushige Takechi
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Patent number: 6693697Abstract: A liquid crystal display device is made up of a TFT substrate, an opposed substrate and a liquid crystal layer arranged between these substrates, in which the TFT substrate is provided with gate lines, data lines and TFT on its transparent insulative substrate, in addition, a passivation film is provided so as to cover them. A color filter is provided on the passivation film, and a black matrix is provided at corresponding area to above part of the TFT and to above part of the data line on the color filter. In addition, a first overcoat layer with film thickness of degree of 1 to 3 &mgr;m is provided so as to cover the black matrix. Further, a second overcoat layer with film thickness of approximate 0.5 &mgr;m is provided at the whole surface except for a contact hole. Furthermore, a pixel electrode is provided on pixel formation area on the second overcoat layer.Type: GrantFiled: January 11, 2002Date of Patent: February 17, 2004Assignee: NEC LCD Technologies, Ltd.Inventors: Michiaki Sakamoto, Yuji Yamamoto, Mamoru Okamoto, Shigeru Kimura, Shinichi Nakata, Shouichi Kuroha, Masanobu Hidehira, Yoshitaka Horie, Takayuki Ishino
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Patent number: 6632696Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.Type: GrantFiled: December 20, 2000Date of Patent: October 14, 2003Assignee: NEC CorporationInventors: Shigeru Kimura, Takahiko Watanabe, Tae Yoshikawa, Hiroyuki Uchida, Shusaku Kido, Shinichi Nakata, Tsutomu Hamada, Hisanobu Shimodouzono, Satoshi Doi, Toshihiko Harano, Akitoshi Maeda, Satoshi Ihida, Hiroaki Tanaka, Takasuke Hayase, Shouichi Kuroha, Hirofumi Ihara, Kazushige Takechi
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Patent number: 6608653Abstract: A thin film transistor is designed in such a manner that a semiconductor region includes source and drain electrodes in a channel width direction and further, a planar source-side overlap area constructed by a gate electrode, the source electrode and the semiconductor region and a planar drain-side overlap area constructed by the gate electrode, the drain electrode and the semiconductor region exist. An optimal overlap length of one of the source-side and drain-side overlap areas in a channel length direction is determined, for instance, to be 4 &mgr;m, for a light incident on a channel portion of the thin film transistor to have a light intensity below or equal to 0.2% of a light intensity of the backlight incident toward the thin film transistor, thereby reducing a light-induced OFF leak current sufficiently and further improving flickering and display uniformity.Type: GrantFiled: November 28, 2001Date of Patent: August 19, 2003Assignee: NEC LCD Technologies, Ltd.Inventors: Shunsuke Shiga, Fuminori Tamura, Shouichi Kuroha, Makoto Watanabe
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Publication number: 20030013221Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.Type: ApplicationFiled: September 12, 2002Publication date: January 16, 2003Inventors: Shigeru Kimura, Takahiko Watanabe, Tae Yoshikawa, Hiroyuki Uchida, Shusaku Kido, Shinichi Nakata, Tsutomu Hamada, Hisanobu Shimodouzono, Satoshi Doi, Toshihiko Harano, Akitoshi Maeda, Satoshi Ihida, Hiroaki Tanaka, Takasuke Hayase, Shouichi Kuroha, Hirofumi Ihara, Kazushige Takechi
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Publication number: 20020118318Abstract: In an active matrix type liquid crystal display device comprising a TFT having gate lines and data lines formed in a matrix manner and being connected to a source line, a contact hole for connecting the source line with a pixel electrode is formed in a position overlapping a disclination line. The contact hole is formed in a position overlapping a capacitance portion of the gate line. The gate line and the source line are provided to oppose to each other, and electrostatic capacitance is stored therebetween.Type: ApplicationFiled: February 25, 2002Publication date: August 29, 2002Applicant: NEC CORPORATIONInventors: Masanobu Hidehira, Michiaki Sakamoto, Shouichi Kuroha, Mamoru Okamoto
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Publication number: 20020113914Abstract: A thin film transistor is designed in such a manner that a semiconductor region includes source and drain electrodes in a channel width direction and further, a planar source-side overlap area constructed by a gate electrode, the source electrode and the semiconductor region and a planar drain-side overlap area constructed by the gate electrode, the drain electrode and the semiconductor region exist. An optimal overlap length of one of the source-side and drain-side overlap areas in a channel length direction is determined, for instance, to be 4 &mgr;m, for a light incident on a channel portion of the thin film transistor to have a light intensity below or equal to 0.2% of a light intensity of the backlight incident toward the thin film transistor, thereby reducing a light-induced OFF leak current sufficiently and further improving flickering and display uniformity.Type: ApplicationFiled: November 28, 2001Publication date: August 22, 2002Applicant: NEC CorporationInventors: Shunsuke Shiga, Fuminori Tamura, Shouichi Kuroha, Makoto Watanabe
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Publication number: 20020089615Abstract: A liquid crystal display device is made up of a TFT substrate, an opposed substrate and a liquid crystal layer arranged between these substrates, in which the TFT substrate is provided with gate lines, data lines and TFT on its transparent insulative substrate, in addition, a passivation film is provided so as to cover them. Color filter is provided on the passivation film, and black matrix is provided at corresponding area to above part of the TFT and to above part of the data line on the color filter. In addition, a first overcoat layer with film thickness of degree of 1 to 3 &mgr;m is provided so as to cover the black matrix. Further, a second overcoat layer with film thickness of approximate 0.5 &mgr;m is provided at the whole surface except for a contact hole. Furthermore, a pixel electrode is provided on pixel formation area on the second overcoat layer.Type: ApplicationFiled: January 11, 2002Publication date: July 11, 2002Applicant: NEC CORPORATIONInventors: Michiaki Sakamoto, Yuji Yamamoto, Mamoru Okamoto, Shigeru Kimura, Shinichi Nakata, Shouichi Kuroha, Masanobu Hidehira, Yoshitaka Horie, Takayuki Ishino
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Publication number: 20010040646Abstract: The present invention provides a liquid crystal display apparatus of a lateral direction electric field drive type comprising an array substrate including a plurality of TFTs each having a gate electrode, a gate insulation film, a semiconductor layer, and a source electrode/drain electrode formed on a transparent substrate and an opposing substrate arrange so as to oppose to the array substrate, wherein the semiconductor layer has a width in the gate length direction identical to the gate length.Type: ApplicationFiled: December 15, 2000Publication date: November 15, 2001Applicant: NEC CorporationInventors: Takahisa Hannuki, Shinichi Nishida, Satoshi Ihida, Shouichi Kuroha, Ryuji Takahashi, Satoshi Miura
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Publication number: 20010010370Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.Type: ApplicationFiled: December 20, 2000Publication date: August 2, 2001Applicant: NEC CorporationInventors: Shigeru Kimura, Takahiko Watanabe, Tae Yoshikawa, Hiroyuki Uchida, Shusaku Kido, Shinichi Nakata, Tsutomu Hamada, Hisanobu Shimodouzono, Satoshi Doi, Toshihiko Harano, Akitoshi Maeda, Satoshi Ihida, Hiroaki Tanaka, Takasuke Hayase, Shouichi Kuroha, Hirofumi Ihara, Kazushige Takechi