Patents by Inventor Shouitirou Nakazawa

Shouitirou Nakazawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6215187
    Abstract: A semiconductor device and manufacturing method thereof attaining higher capacitor capacitance and lower power consumption are provided. On an interlayer oxide film which is a BPTEOS film containing an impurity, an interlayer oxide film which is a TEOS film not containing any impurity is formed. Openings of approximately inverted frusto-conical shape of approximately the same size are formed in interlayer oxide films, respectively, providing a contact hole of such a shape that includes two inverted frusto-cones continued in the vertical direction as a whole is provided. Along the inner wall surface of the contact hole, a storage electrode, a dielectric film and a cell plate electrode constituting a capacitor are formed successively.
    Type: Grant
    Filed: September 21, 1999
    Date of Patent: April 10, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Kenichi Ooto, Heiji Kobayashi, Shouitirou Nakazawa