Abstract: Provided are a display substrate and a display device. The display substrate includes a display region and a border region located at the periphery of the display region. The border region includes a border sealant, and a plurality of normal shift register units and a plurality of dummy shift register units that are arranged in sequence. The display substrate also includes a plurality of gate lines, at least part of the gate lines is located in the display region; at least one of the dummy shift register units is staggered from the normal shift register units in an extending direction of the gate line, and the at least one of the dummy shift register units is staggered from the normal shift register units in a direction away from the border sealant.

Abstract: A mask includes a first light-transmitting portion. The first light-transmitting portion includes a target region and at least one compensation region connected to the target region. A planar pattern of the target region includes a plurality of corners, and a planar pattern of each compensation region extends from one of the plurality of corners. An area of the planar pattern of each compensation region is less than an area of the planar pattern of the target region.

Abstract: A circuit substrate has a first area and a second area. The second area includes a rounded corner region and a first rectangular region connected to the rounded corner region. The first rectangular region extends along a second direction. The circuit substrate includes: a plurality of gate lines disposed in the first area, and a gate driver on array (GOA) circuit disposed in the second area. The GOA circuit including at least one GOA unit disposed in the rounded corner region and a GOA unit disposed in the first rectangular region. Along the first direction, a length of a GOA unit in the rounded corner region is less than a length of the GOA unit in the first rectangular region; and along the second direction, a width of the GOA unit in the rounded corner region is greater than a width of the GOA unit in the first rectangular region.

Abstract: An array substrate includes: a base substrate, a gate line extending in a first direction, a data line extending in a second direction, and a pixel electrode layer, the first direction being substantially perpendicular to the second direction, the gate line and the data line defining a plurality of sub-pixel units, and a plurality of first and second common electrode lines electrically connected to each other and disposed in the same layer as the gate lines. The first common electrode line includes two first common electrode line first portions, and the second common electrode line extends in the second direction. The second common electrode line is located between and electrically connects the two first common electrode line first portions. The second common electrode line is located at a center line of the sub-pixel unit.

Abstract: A mask includes a first light-transmitting portion. The first light-transmitting portion includes a target region and at least one compensation region connected to the target region. A planar pattern of the target region includes a plurality of corners, and a planar pattern of each compensation region extends from one of the plurality of corners. An area of the planar pattern of each compensation region is less than an area of the planar pattern of the target region.

Abstract: A circuit substrate has a first area and a second area. The second area includes a rounded corner region and a first rectangular region connected to the rounded corner region. The first rectangular region extends along a second direction. The circuit substrate includes: a plurality of gate lines disposed in the first area, and a gate driver on array (GOA) circuit disposed in the second area. The GOA circuit including at least one GOA unit disposed in the rounded corner region and a GOA unit disposed in the first rectangular region. Along the first direction, a length of a GOA unit in the rounded corner region is less than a length of the GOA unit in the first rectangular region; and along the second direction, a width of the GOA unit in the rounded corner region is greater than a width of the GOA unit in the first rectangular region.

Abstract: An array substrate includes: a base substrate, a gate line extending in a first direction, a data line extending in a second direction, and a pixel electrode layer, the first direction being substantially perpendicular to the second direction, the gate line and the data line defining a plurality of sub-pixel units, and a plurality of first and second common electrode lines electrically connected to each other and disposed in the same layer as the gate lines. The first common electrode line includes two first common electrode line first portions, and the second common electrode line extends in the second direction. The second common electrode line is located between and electrically connects the two first common electrode line first portions. The second common electrode line is located at a center line of the sub-pixel unit.

Abstract: A gate driving circuitry, a method for driving the same and a display device are provided. The gate driving circuitry includes N gate driving units and N groups of clock signal lines, and an n-th gate driving unit is correspondingly connected to an n-th group of clock signal lines, where N is an integer greater than 1, and n is a positive integer less than or equal to N. Each group of clock signal lines includes 2a clock signal lines, where a is equal to 1, or a is an even number; each of the gate driving units includes at least one shift register module; and each shift register module in the n-th gate driving unit is connected to the n-th group of clock signal lines.

Abstract: Embodiments of the present disclosure provide an array substrate, a method of manufacturing the same, a liquid crystal display panel, and a display device. The array substrate includes: a base substrate, a data line disposed on the base substrate and a pixel electrode layer disposed on a layer in which the data line is located. The pixel electrode layer includes a plurality of columns of pixel electrodes that are spaced apart from one another. An orthographic projection of the data line on the base substrate covers an orthographic projection of a gap between two adjacent columns of pixel electrodes on the base substrate, and a width of the data line is greater than a width of the gap between two adjacent columns of pixel electrodes.