Abstract: A method of and apparatus for single antenna interference rejection (SAIR) relaxation. Interference in a received signal is reduced by performing synchronization and whitening of the received signal. The synchronization and whitening includes performing the following steps at least one time: 1) performing a synchronization and vector-noise-correlation estimation of an input signal to yield an interference model; and 2) performing a spatio-temporal whitening operation using the interference model and the input signal to yield an updated received signal. The input signal is the received signal when the step of performing the synchronization and vector-noise-correlation estimation is performed a first time. The input signal is the updated received signal when the step of performing the synchronization and vector-noise-correlation estimation is performed following the first time.

Abstract: Interference rejection in a wireless communication system involves determining a complement spatial-temporal signal subspace that is complement to a spatial-temporal signal subspace of an interference signal included in a received signal. The received signal is projected onto the complement spatial-temporal signal subspace, whereby the interference signal included in the received signal is reduced. Determining the complement spatial-temporal signal subspace can include estimating the interference signal; determining a Block Yule-Walker matrix for the estimated interference signal; and determining the complement spatial-temporal signal subspace from the Block Yule-Walker matrix.

Abstract: A method of and apparatus for reducing interference in a received signal. A normalized noise correlate is determined using the received signal and a first channel estimate of the received signal. Conditional whitening-filter settings are determined using the normalized noise correlate. A whitening filter is applied to the received signal in accordance with the conditional whitening-filter settings. A synchronization adjustment of an updated received signal is performed. A second channel estimate, which may be of the same span as the first channel estimate, is determined using an updated synchronization position and the updated received signal.

Abstract: A method of noise whitening a received signal comprises estimating (201) the noise of a channel; calculating (202) the power spectrum of the channel; adding (203) the estimated noise and the calculated power spectrum to build (204) a positive definite band matrix; applying (205) symmetric factorisation to the matrix; deriving (206) the spectral factorisation of the channel from the symmetric factorisation; approximating (207) the spectral factorisation; calculating (208) the noise whitening prefilter settings from the derived spectral factorisation and the estimated noise of the channel; and prefiltering the received signal to noise whiten the signal.

Abstract: A channel estimation method and apparatus for GSM/EDGE digital communications systems utilizing previously unexploited properties of GSM/EDGE training sequences to permit a more efficient initial channel estimation for equalizer operation and for joint synchronization and equalizer window sizing. In particular, any consecutive 16-symbol segment of the 26-symbol GSM/EDGE training sequences is both shift invariant and order invariant; and these properties enable channel estimation to be carried out on delayed (shifted) training sequence segments, permitting ISI corrupted leading symbols to be avoided in computations and leading taps to be estimated, using the same training sequence segments, regardless of equalizer window size; and to enable all the 1–8 tap channels to be estimated without matrix inversion, permitting a significant reduction in computational complexity.

Abstract: A method of determining a DC offset in a communications signal received via a communications channel, the communications signal comprising a sequence of training symbols. The method comprises providing a channel estimate of the communications channel based on said sequence of training symbols; determining, based on the channel estimate, an estimate of a noise contribution introduced by the communications channel; and determining an estimate of the DC offset from the determined estimate of the noise contribution.

Abstract: A method of estimating a transmission channel (302) comprises receiving a signal burst, which includes a sequence of training symbols; and determining (305) a desired synchronization position (p) of the training sequence with respect to the received signal burst. The method further comprises determining estimates of the transmission channel as a function of the synchronization position (p) and a size of the equalizer window (m); and determining the desired synchronization position and the size of the equilizer window by calculating an error measure based on the received signal burst and the determined estimates for selected values of the synchronization position and of the size of the equalizer window, where the values of the size of the equalizer window are selected between predetermined upper (mu) and lower (ml) bounds.

Abstract: A digital signal, x(n) (where n is an integer), is decimated by determining a signal vector, y(k), of size M by partitioning samples of the digital signal, x(n) according to sampling phases of the samples. The signal vector, y(k), is projected onto an N-dimensional sub-space, wherein N is an integer and N<M. Where the digital signal is generated by means of oversampling, it is possible to perform decimation in a way that optimizes the signal-to-noise ratio (SNR) of the decimated signal by suitably determining the sub-space onto which the signal vector will be projected.

Abstract: A method and apparatus for receiving a communication signal r(t) subject to noise n(t) over a communication channel (10) is disclosed. The method comprises the steps of: receiving (100) the communication signal r(t) comprising the noise n(t), estimating (103) the amount of noise n(t) in the communication signal r(t), and determining (105) the hue of the estimated amount noise n(t), wherein the received communication signal r(t) is passed through a whitening filter if the hue of the noise n(t) is greater than a predetermined threshold level.

Abstract: A method of and apparatus for single antenna interference rejection (SAIR) relaxation. Interference in a received signal is reduced by performing synchronization and whitening of the received signal. The synchronization and whitening includes performing the following steps at least one time: 1) performing a synchronization and vector-noise-correlation estimation of an input signal to yield an interference model; and 2) performing a spatio-temporal whitening operation using the interference model and the input signal to yield an updated received signal. The input signal is the received signal when the step of performing the synchronization and vector-noise-correlation estimation is performed a first time. The input signal is the updated received signal when the step of performing the synchronization and vector-noise-correlation estimation is performed following the first time.

Abstract: A method of and apparatus for reducing interference in a received signal. A normalized noise correlate is determined using the received signal and a first channel estimate of the received signal. Conditional whitening-filter settings are determined using the normalized noise correlate. A whitening filter is applied to the received signal in accordance with the conditional whitening-filter settings. A synchronization adjustment of an updated received signal is performed. A second channel estimate, which may be of the same span as the first channel estimate, is determined using an updated synchronization position and the updated received signal.

Abstract: There is disclosed a radio receiver, a filter which may be used in a radio receiver, in which received signals are applied to a digital filter twice, with an intermediate time reversal. This has the effect that any phase distortion introduced by the filter is cancelled by the application of the time inverted signal to the filter. This means that a non-liner filter can be used. Specifically, in preferred embodiments of the invention, an IIR wave digital filter can be used, which means that the device can have lower power consumption and requires a smaller silicon area than would otherwise be the case.

Abstract: An apparatus and method enhance equalizer performance in multipath fast-fading channels in systems such as those employing GSM EDGE. The enhancement is achieved via computationally-efficient envelope-fade tracking that tracks a collective amplitude variation of a multipath channel. The envelope-fade tracking can be used in combination with an Automatic Frequency Compensation (AFC) phase tracker. Parameters, such as the order and the step size of the envelope fade tracker and the AFC, can be optimized independently.

Abstract: A method for estimating noise auto-correlation for an equalizer includes the step of estimating a noise auto-correlation and weighting the estimated noise auto-correlation by a selected weighted window.

Abstract: A channel estimation method and apparatus for GSM/EDGE digital communications systems utilizing previously unexploited properties of GSM/EDGE training sequences to permit a more efficient initial channel estimation for equalizer operation and for joint synchronization and equalizer window sizing. In particular, any consecutive 16-symbol segment of the 26-symbol GSM/EDGE training sequences is both shift invariant and order invariant; and these properties enable channel estimation to be carried out on delayed (shifted) training sequence segments, permitting ISI corrupted leading symbols to be avoided in computations and leading taps to be estimated, using the same training sequence segments, regardless of equalizer window size; and to enable all the 1-8 tap channels to be estimated without matrix inversion, permitting a significant reduction in computational complexity.

Abstract: A real-time pipeline processor, which is particularly suited for VLSI implementation, is based on a hardware oriented radix-2.sup.2 algorithm derived by integrating a twiddle factor decomposition technique in a divide and conquer approach. The radix-2.sup.2 algorithm has the same multiplicative complexity as a radix-4 algorithm, but retains the butterfly structure of a radix-2 algorithm. A single-path delay-feedback architecture is used in order to exploit the spatial regularity in the signal flow graph of the algorithm. For a length-N DFT transform, the hardware requirements of the processor proposed by the present invention is minimal on both dominant components: Log4N-1 complex multipliers, and N-1 complex data memory.