Abstract: A welding inspection method has steps of: generating transmission laser light for generating an ultrasonic wave and transmitting the transmission laser light to an object to be inspected during or after welding operation for irradiation; generating reception laser light for detecting an ultrasonic wave and transmitting the reception laser light to the object to be inspected for irradiation; collecting laser light scattered and reflected at surface of the object to be inspected; performing interference measurement of the laser light and obtaining an ultrasonic signal; and analyzing the ultrasonic signal obtained by the interference measurement. At least one of the transmission laser light generated in the transmission laser light irradiation step and the reception laser light generated in the reception laser light irradiation step is irradiated onto a welded metal part or a groove side surface.

Abstract: A welding system has: a welding mechanism, a reception laser light source, a reception optical mechanism, an interferometer, a data recording/analysis mechanism and a data recording/analysis mechanism. The reception laser light source generates reception laser light so as to irradiate the object to be welded with the reception laser light for the purpose of detecting a reflected ultrasonic wave obtained as a result of reflection of a transmission ultrasonic wave. The reception optical mechanism transmits, during or after welding operation, the reception laser light generated from the reception laser light source to the surface of the object to be welded for irradiation while moving, together with the welding mechanism, relative to the object to be welded and collects laser light scattered/reflected at the surface of the object to be welded.

Abstract: A welding inspection method has steps of: generating transmission laser light for generating an ultrasonic wave and transmitting the transmission laser light to an object to be inspected during or after welding operation for irradiation; generating reception laser light for detecting an ultrasonic wave and transmitting the reception laser light to the object to be inspected for irradiation; collecting laser light scattered and reflected at surface of the object to be inspected; performing interference measurement of the laser light and obtaining an ultrasonic signal; and analyzing the ultrasonic signal obtained by the interference measurement. At least one of the transmission laser light generated in the transmission laser light irradiation step and the reception laser light generated in the reception laser light irradiation step is irradiated onto a welded metal part or a groove side surface.

Abstract: An electro-migration verifying method is comprised of: a data inputting process step; a netlist updating process step (first process operation) for updating a netlist which is constructed by a wiring line parasitic element and a device element based upon a current density limit value database, a characteristic variation database, and wiring line current information; a current density calculating process step (second process operation) for calculating current density of the wiring line parasitic element from a device current and the updated netlist; a wiring line current information updating process step (third process operation) for updating the wiring line current information based upon the current density; a current density limit value comparing/judging process step (fourth process operation) for judging whether or not a current density value is located within the current density limit value based upon the updated wiring line current information and the current density limit value database; an electro-migra

Abstract: An electro-migration verifying method is comprised of: a data inputting process step; a netlist updating process step (first process operation) for updating a netlist which is constructed by a wiring line parasitic element and a device element based upon a current density limit value database, a characteristic variation database, and wiring line current information; a current density calculating process step (second process operation) for calculating current density of the wiring line parasitic element from a device current and the updated netlist; a wiring line current information updating process step (third process operation) for updating the wiring line current information based upon the current density; a current density limit value comparing/judging process step (fourth process operation) for judging whether or not a current density value is located within the current density limit value based upon the updated wiring line current information and the current density limit value database; an electro-migra

Abstract: An impedance of a power supply wire is calculated based on design data of a semiconductor integrated circuit, a frequency characteristic of the calculated impedance is obtained, and a design of the semiconductor integrated circuit is changed based on the obtained frequency characteristic. As the above-described impedance, an impedance between power supplies that are different in potential such as a power supply and a ground may be calculated, or an impedance between power supplies that are substantially the same in potential such as a power supply and an N-well power supply may be calculated. By a design modification, a wiring method, the number of pads, separation of power supplies, a type of package, a characteristic of an inductance element, a substrate structure, a distance between wires, a decoupling capacitance, a length of a wire, and a characteristic of a resistance element, for example, are changed.

Abstract: The resistance value of a supply line (Rline), the resistance value of a decoupling capacitor (Rcap), and the resistance value of a transistor (Rmos) are separately calculated from mask layout information of a semiconductor integrated circuit. The resistance value between external terminals (Ri) is calculated from the resistance value Rline, the resistance value Rcap, and the resistance value Rmos.

Abstract: By reflecting physical information extracted from layout information on hierarchical circuit information while maintaining its hierarchical structure and creating the hierarchical circuit information with the physical information, to reflect the physical information with its accuracy kept on the hierarchical circuit information, thereby realizing high speed of circuit simulation and reduction in a quantity of data. This invention includes a physical information extracting step of extracting, from layout information, information on a physical status i.e. physical information of a single unit e.g.

Abstract: The resistance value of a supply line (Rline), the resistance value of a decoupling capacitor (Rcap), and the resistance value of a transistor (Rmos) are separately calculated from mask layout information 31 of a semiconductor integrated circuit. The resistance value between external terminals (Ri) is calculated from the resistance value Rline, the resistance value Rcap, and the resistance value Rmos.

Abstract: An impedance of a power supply wire is calculated based on design data of a semiconductor integrated circuit, a frequency characteristic of the calculated impedance is obtained, and a design of the semiconductor integrated circuit is changed based on the obtained frequency characteristic. As the above-described impedance, an impedance between power supplies that are different in potential such as a power supply and a ground may be calculated, or an impedance between power supplies that are substantially the same in potential such as a power supply and an N-well power supply may be calculated. By a design modification, a wiring method, the number of pads, separation of power supplies, a type of package, a characteristic of an inductance element, a substrate structure, a distance between wires, a decoupling capacitance, a length of a wire, and a characteristic of a resistance element, for example, are changed.

Abstract: Based on design data of a semiconductor integrated circuit, an impedance related to a power supply wire is calculated, and based on the calculated impedance, a frequency characteristic of power supply noise is analyzed. In calculation of an impedance, an impedance between power supplies which are different in potential, e.g., a main power supply and a ground, may be calculated. Alternatively, an impedance between power supplies which are substantially the same in potential, e.g., a main power supply and an N-well power supply, may be calculated. The calculated impedance includes a wire capacitance between power supply wires, a substrate resistance, an impedance of a package connected to the power supply wires, and so on. Thus, it is possible to provide a method for analyzing power supply noise of a semiconductor integrated circuit, which can be executed at an early stage of a design process with a small amount of calculation.