Patents by Inventor Shreekanth K. Sampigethaya

Shreekanth K. Sampigethaya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory having a redundancy scheme to allow one fuse to blow per faulty memory column
    Patent number: 6396760
    Abstract: An apparatus and method in which a single fuse is asserted in a memory bank having a redundancy memory column structure. The assertion of the single fuse causes two or more of the input-output circuits to shift away from a primary memory column to a substitute memory column.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: May 28, 2002
    Assignee: Virage Logic Corporation
    Inventors: Niranjan Behera, Shreekanth K. Sampigethaya