Patents by Inventor Shrikantha VENKATESH

Shrikantha VENKATESH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for debugging microcontroller using low-bandwidth real-time trace
    Patent number: 11442805
    Abstract: The present disclosure relates to a system for real-time debugging of microcontroller, the system includes a microcontroller configured in an embedded device to execute a set of instructions, the microcontroller includes a counter unit that generates a set of values for the executed set of instructions. An on-chip debugger (OCD) fetches a selective set of data packets of the set of instructions from the microcontroller. An encoder encodes the selective set of data packets to store the encoded set of data packets in a storage unit, wherein encoding of the set of data packets is performed to compress the data for minimal information size such that the external debugger unit (EDU) receives the encoded set of data packets with minimal information size through the external interface.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: September 13, 2022
    Assignee: SILICONCH SYSTEMS PVT LTD
    Inventors: Rakesh Kumar Polasa, Shrikantha Venkatesh, Harshith Subramanya
  • SYSTEM AND METHOD FOR DEBUGGING MICROCONTROLLER USING LOW-BANDWIDTH REAL-TIME TRACE
    Publication number: 20220283892
    Abstract: The present disclosure relates to a system for real-time debugging of microcontroller, the system includes a microcontroller configured in an embedded device to execute a set of instructions, the microcontroller includes a counter unit that generates a set of values for the executed set of instructions. An on-chip debugger (OCD) fetches a selective set of data packets of the set of instructions from the microcontroller. An encoder encodes the selective set of data packets to store the encoded set of data packets in a storage unit, wherein encoding of the set of data packets is performed to compress the data for minimal information size such that the external debugger unit (EDU) receives the encoded set of data packets with minimal information size through the external interface.
    Type: Application
    Filed: June 29, 2021
    Publication date: September 8, 2022
    Inventors: Rakesh Kumar POLASA, Shrikantha VENKATESH, Harshith SUBRAMANYA